40 static void edac_pci_read_dword(struct pci_dev *dev, int reg, u32 *val32)  in edac_pci_read_dword()  argument
44 	ret = pci_read_config_dword(dev, reg, val32);  in edac_pci_read_dword()
50 static void edac_pci_write_dword(struct pci_dev *dev, int reg, u32 val32)  in edac_pci_write_dword()  argument
54 	ret = pci_write_config_dword(dev, reg, val32);  in edac_pci_write_dword()
95 	u32 val32;  in amd8131_pcix_init()  local
99 	edac_pci_read_dword(dev, REG_MEM_LIM, &val32);  in amd8131_pcix_init()
100 	if (val32 & MEM_LIMIT_MASK)  in amd8131_pcix_init()
101 		edac_pci_write_dword(dev, REG_MEM_LIM, val32);  in amd8131_pcix_init()
104 	edac_pci_read_dword(dev, REG_INT_CTLR, &val32);  in amd8131_pcix_init()
105 	if (val32 & INT_CTLR_DTS)  in amd8131_pcix_init()
106 		edac_pci_write_dword(dev, REG_INT_CTLR, val32);  in amd8131_pcix_init()
109 	edac_pci_read_dword(dev, REG_LNK_CTRL_A, &val32);  in amd8131_pcix_init()
110 	if (val32 & LNK_CTRL_CRCERR_A)  in amd8131_pcix_init()
111 		edac_pci_write_dword(dev, REG_LNK_CTRL_A, val32);  in amd8131_pcix_init()
114 	edac_pci_read_dword(dev, REG_LNK_CTRL_B, &val32);  in amd8131_pcix_init()
115 	if (val32 & LNK_CTRL_CRCERR_B)  in amd8131_pcix_init()
116 		edac_pci_write_dword(dev, REG_LNK_CTRL_B, val32);  in amd8131_pcix_init()
124 	edac_pci_read_dword(dev, REG_INT_CTLR, &val32);  in amd8131_pcix_init()
125 	val32 |= INT_CTLR_PERR | INT_CTLR_SERR | INT_CTLR_DTSE;  in amd8131_pcix_init()
126 	edac_pci_write_dword(dev, REG_INT_CTLR, val32);  in amd8131_pcix_init()
129 	edac_pci_read_dword(dev, REG_STS_CMD, &val32);  in amd8131_pcix_init()
130 	val32 |= STS_CMD_SERREN;  in amd8131_pcix_init()
131 	edac_pci_write_dword(dev, REG_STS_CMD, val32);  in amd8131_pcix_init()
134 	edac_pci_read_dword(dev, REG_LNK_CTRL_A, &val32);  in amd8131_pcix_init()
135 	val32 |= LNK_CTRL_CRCFEN;  in amd8131_pcix_init()
136 	edac_pci_write_dword(dev, REG_LNK_CTRL_A, val32);  in amd8131_pcix_init()
139 	edac_pci_read_dword(dev, REG_LNK_CTRL_B, &val32);  in amd8131_pcix_init()
140 	val32 |= LNK_CTRL_CRCFEN;  in amd8131_pcix_init()
141 	edac_pci_write_dword(dev, REG_LNK_CTRL_B, val32);  in amd8131_pcix_init()
146 	u32 val32;  in amd8131_pcix_exit()  local
150 	edac_pci_read_dword(dev, REG_INT_CTLR, &val32);  in amd8131_pcix_exit()
151 	val32 &= ~(INT_CTLR_PERR | INT_CTLR_SERR | INT_CTLR_DTSE);  in amd8131_pcix_exit()
152 	edac_pci_write_dword(dev, REG_INT_CTLR, val32);  in amd8131_pcix_exit()
155 	edac_pci_read_dword(dev, REG_STS_CMD, &val32);  in amd8131_pcix_exit()
156 	val32 &= ~STS_CMD_SERREN;  in amd8131_pcix_exit()
157 	edac_pci_write_dword(dev, REG_STS_CMD, val32);  in amd8131_pcix_exit()
160 	edac_pci_read_dword(dev, REG_LNK_CTRL_A, &val32);  in amd8131_pcix_exit()
161 	val32 &= ~LNK_CTRL_CRCFEN;  in amd8131_pcix_exit()
162 	edac_pci_write_dword(dev, REG_LNK_CTRL_A, val32);  in amd8131_pcix_exit()
165 	edac_pci_read_dword(dev, REG_LNK_CTRL_B, &val32);  in amd8131_pcix_exit()
166 	val32 &= ~LNK_CTRL_CRCFEN;  in amd8131_pcix_exit()
167 	edac_pci_write_dword(dev, REG_LNK_CTRL_B, val32);  in amd8131_pcix_exit()
174 	u32 val32;  in amd8131_pcix_check()  local
177 	edac_pci_read_dword(dev, REG_MEM_LIM, &val32);  in amd8131_pcix_check()
178 	if (val32 & MEM_LIMIT_MASK) {  in amd8131_pcix_check()
183 			val32 & MEM_LIMIT_DPE,  in amd8131_pcix_check()
184 			val32 & MEM_LIMIT_RSE,  in amd8131_pcix_check()
185 			val32 & MEM_LIMIT_RMA,  in amd8131_pcix_check()
186 			val32 & MEM_LIMIT_RTA,  in amd8131_pcix_check()
187 			val32 & MEM_LIMIT_STA,  in amd8131_pcix_check()
188 			val32 & MEM_LIMIT_MDPE);  in amd8131_pcix_check()
190 		val32 |= MEM_LIMIT_MASK;  in amd8131_pcix_check()
191 		edac_pci_write_dword(dev, REG_MEM_LIM, val32);  in amd8131_pcix_check()
197 	edac_pci_read_dword(dev, REG_INT_CTLR, &val32);  in amd8131_pcix_check()
198 	if (val32 & INT_CTLR_DTS) {  in amd8131_pcix_check()
201 		printk(KERN_INFO "DTS: %d\n", val32 & INT_CTLR_DTS);  in amd8131_pcix_check()
203 		val32 |= INT_CTLR_DTS;  in amd8131_pcix_check()
204 		edac_pci_write_dword(dev, REG_INT_CTLR, val32);  in amd8131_pcix_check()
210 	edac_pci_read_dword(dev, REG_LNK_CTRL_A, &val32);  in amd8131_pcix_check()
211 	if (val32 & LNK_CTRL_CRCERR_A) {  in amd8131_pcix_check()
214 		printk(KERN_INFO "CRCERR: %d\n", val32 & LNK_CTRL_CRCERR_A);  in amd8131_pcix_check()
216 		val32 |= LNK_CTRL_CRCERR_A;  in amd8131_pcix_check()
217 		edac_pci_write_dword(dev, REG_LNK_CTRL_A, val32);  in amd8131_pcix_check()
223 	edac_pci_read_dword(dev, REG_LNK_CTRL_B, &val32);  in amd8131_pcix_check()
224 	if (val32 & LNK_CTRL_CRCERR_B) {  in amd8131_pcix_check()
227 		printk(KERN_INFO "CRCERR: %d\n", val32 & LNK_CTRL_CRCERR_B);  in amd8131_pcix_check()
229 		val32 |= LNK_CTRL_CRCERR_B;  in amd8131_pcix_check()
230 		edac_pci_write_dword(dev, REG_LNK_CTRL_B, val32);  in amd8131_pcix_check()