Lines Matching defs:amd64_pvt
291 struct amd64_pvt { struct
292 struct low_ops *ops;
295 struct pci_dev *F1, *F2, *F3;
297 u16 mc_node_id; /* MC index of this MC node */
298 u8 fam; /* CPU family */
299 u8 model; /* ... model */
300 u8 stepping; /* ... stepping */
302 int ext_model; /* extended model value of this node */
303 int channel_count;
306 u32 dclr0; /* DRAM Configuration Low DCT0 reg */
307 u32 dclr1; /* DRAM Configuration Low DCT1 reg */
308 u32 dchr0; /* DRAM Configuration High DCT0 reg */
309 u32 dchr1; /* DRAM Configuration High DCT1 reg */
310 u32 nbcap; /* North Bridge Capabilities */
311 u32 nbcfg; /* F10 North Bridge Configuration */
312 u32 ext_nbcfg; /* Extended F10 North Bridge Configuration */
313 u32 dhar; /* DRAM Hoist reg */
314 u32 dbam0; /* DRAM Base Address Mapping reg for DCT0 */
315 u32 dbam1; /* DRAM Base Address Mapping reg for DCT1 */
318 struct chip_select csels[2];
321 struct dram_range ranges[DRAM_RANGES];
323 u64 top_mem; /* top of memory below 4GB */
324 u64 top_mem2; /* top of memory above 4GB */
326 u32 dct_sel_lo; /* DRAM Controller Select Low */
327 u32 dct_sel_hi; /* DRAM Controller Select High */
328 u32 online_spare; /* On-Line spare Reg */
331 u8 ecc_sym_sz;
357 static inline u64 get_dram_base(struct amd64_pvt *pvt, u8 i) in get_dram_base() argument