155 	return amd64_read_pci_cfg(pvt->F2, offset, val);  in amd64_read_dct_pci_cfg()
206 		pci_write_bits32(pvt->F2, F15H_M60H_SCRCTRL, scrubval, 0x001F);  in __set_scrub_rate()
208 		pci_write_bits32(pvt->F2, F15H_M60H_SCRCTRL, scrubval, 0x001F);  in __set_scrub_rate()
250 			amd64_read_pci_cfg(pvt->F2, F15H_M60H_SCRCTRL, &scrubval);  in get_scrub_rate()
1351 	if (!amd64_read_pci_cfg(pvt->F2, DCT_SEL_LO, &pvt->dct_sel_lo)) {  in read_dram_ctl_register()
1372 	amd64_read_pci_cfg(pvt->F2, DCT_SEL_HI, &pvt->dct_sel_hi);  in read_dram_ctl_register()
1583 	amd64_read_pci_cfg(pvt->F2, SWAP_INTLV_REG, &swap_reg);  in f1x_swap_interleaved_region()
2236 	pvt->F1 = pci_get_related_function(pvt->F2->vendor, f1_id, pvt->F2);  in reserve_mc_sibling_devs()
2245 	pvt->F3 = pci_get_related_function(pvt->F2->vendor, f3_id, pvt->F2);  in reserve_mc_sibling_devs()
2257 	edac_dbg(1, "F2: %s\n", pci_name(pvt->F2));  in reserve_mc_sibling_devs()
2702 	mci->dev_name		= pci_name(pvt->F2);  in setup_mci_misc_attrs()
2781 static int init_one_instance(struct pci_dev *F2)  in init_one_instance()  argument
2788 	u16 nid = amd_pci_dev_to_node_id(F2);  in init_one_instance()
2796 	pvt->F2 = F2;  in init_one_instance()
2839 	mci->pdev = &pvt->F2->dev;  in init_one_instance()
2998 	pci_ctl = edac_pci_create_generic_ctl(&pvt->F2->dev, EDAC_MOD_STR);  in setup_pci_device()