Lines Matching refs:on
14 depends on HAS_IOMEM && EDAC_SUPPORT
22 If this code is reporting problems on your system, please
47 This turns on debugging information for the entire EDAC subsystem.
53 tristate "Decode MCEs in human-readable form (only on AMD for now)"
54 depends on CPU_SUP_AMD && X86_MCE_AMD
58 occurring on your machine in human-readable form.
69 memory. EDAC can report statistics on memory error
77 depends on ACPI_APEI_GHES && (EDAC_MM_EDAC=y)
100 depends on EDAC_MM_EDAC && AMD_NB && EDAC_DECODE_MCE
102 Support for error detection and correction of DRAM ECC errors on
107 depends on EDAC_AMD64
126 depends on EDAC_MM_EDAC && PCI && X86_32
128 Support for error detection and correction on the AMD 76x
133 depends on EDAC_MM_EDAC && PCI && X86_32
135 Support for error detection and correction on the Intel
140 depends on EDAC_MM_EDAC && PCI && X86
142 Support for error detection and correction on the Intel
147 depends on EDAC_MM_EDAC && PCI && X86_32
148 depends on BROKEN
150 Support for error detection and correction on the Intel
155 depends on EDAC_MM_EDAC && PCI && X86_32
157 Support for error detection and correction on the Intel
162 depends on EDAC_MM_EDAC && PCI && X86
164 Support for error detection and correction on the Intel
169 depends on EDAC_MM_EDAC && PCI && X86
171 Support for error detection and correction on the Intel
176 depends on EDAC_MM_EDAC && PCI && X86
178 Support for error detection and correction on the Intel
183 depends on EDAC_MM_EDAC && PCI && X86
185 Support for error detection and correction on the Intel
190 depends on EDAC_MM_EDAC && PCI && X86
192 Support for error detection and correction on the Intel
197 depends on EDAC_MM_EDAC && PCI && X86
204 depends on EDAC_MM_EDAC && PCI && X86 && X86_MCE_INTEL
207 i7 Core (Nehalem) Integrated Memory Controller that exists on
213 depends on EDAC_MM_EDAC && PCI && X86_32
215 Support for error detection and correction on the Intel
220 depends on EDAC_MM_EDAC && PCI && X86_32
222 Support for error detection and correction on the Radisys
227 depends on EDAC_MM_EDAC && X86 && PCI
234 depends on EDAC_MM_EDAC && X86 && PCI
241 depends on EDAC_MM_EDAC && X86 && PCI
248 depends on EDAC_MM_EDAC && PCI && X86_64 && X86_MCE_INTEL
249 depends on PCI_MMCONFIG
256 depends on EDAC_MM_EDAC && FSL_SOC
258 Support for error detection and correction on the Freescale
263 depends on EDAC_MM_EDAC && MV64X60
265 Support for error detection and correction on the Marvell
270 depends on EDAC_MM_EDAC && PCI
271 depends on PPC_PASEMI
273 Support for error detection and correction on PA Semi
278 depends on EDAC_MM_EDAC && PPC_CELL_COMMON
280 Support for error detection and correction on the
282 on platform without a hypervisor
286 depends on EDAC_MM_EDAC && 4xx
288 This enables support for EDAC on the ECC memory used
295 depends on EDAC_MM_EDAC && PCI && PPC_MAPLE
297 Support for error detection and correction on the
300 on some machine other than Maple.
304 depends on EDAC_MM_EDAC && PCI && PPC_MAPLE
306 Support for error detection and correction on the
309 on some machine other than Maple.
313 depends on EDAC_MM_EDAC && PPC64
315 Support for error detection and correction on the
322 depends on EDAC_MM_EDAC && TILE
325 Support for error detection and correction on the
330 depends on EDAC_MM_EDAC && ARCH_HIGHBANK
332 Support for error detection and correction on the
337 depends on EDAC_MM_EDAC && ARCH_HIGHBANK
339 Support for error detection and correction on the
344 depends on EDAC_MM_EDAC && CPU_CAVIUM_OCTEON
346 Support for error detection and correction on the primary caches of
351 depends on EDAC_MM_EDAC && CAVIUM_OCTEON_SOC
353 Support for error detection and correction on the
358 depends on EDAC_MM_EDAC && CAVIUM_OCTEON_SOC
360 Support for error detection and correction on the
365 depends on EDAC_MM_EDAC && PCI && CAVIUM_OCTEON_SOC
367 Support for error detection and correction on the
372 depends on EDAC_MM_EDAC=y && ARCH_SOCFPGA
374 Support for error detection and correction on the
381 depends on EDAC_MM_EDAC && ARCH_ZYNQ
383 Support for error detection and correction on the Synopsys DDR
388 depends on EDAC_MM_EDAC && (ARM64 || COMPILE_TEST)
390 Support for error detection and correction on the