246 static inline void tdc_write(struct tegra_dma_channel *tdc,  in tdc_write()  function
403 		tdc_write(tdc, TEGRA_APBDMA_CHAN_CSRE,  in tegra_dma_pause()
417 		tdc_write(tdc, TEGRA_APBDMA_CHAN_CSRE, 0);  in tegra_dma_resume()
431 	tdc_write(tdc, TEGRA_APBDMA_CHAN_CSR, csr);  in tegra_dma_stop()
435 	tdc_write(tdc, TEGRA_APBDMA_CHAN_CSR, csr);  in tegra_dma_stop()
441 		tdc_write(tdc, TEGRA_APBDMA_CHAN_STATUS, status);  in tegra_dma_stop()
451 	tdc_write(tdc, TEGRA_APBDMA_CHAN_CSR, ch_regs->csr);  in tegra_dma_start()
452 	tdc_write(tdc, TEGRA_APBDMA_CHAN_APBSEQ, ch_regs->apb_seq);  in tegra_dma_start()
453 	tdc_write(tdc, TEGRA_APBDMA_CHAN_APBPTR, ch_regs->apb_ptr);  in tegra_dma_start()
454 	tdc_write(tdc, TEGRA_APBDMA_CHAN_AHBSEQ, ch_regs->ahb_seq);  in tegra_dma_start()
455 	tdc_write(tdc, TEGRA_APBDMA_CHAN_AHBPTR, ch_regs->ahb_ptr);  in tegra_dma_start()
457 		tdc_write(tdc, TEGRA_APBDMA_CHAN_WCOUNT, ch_regs->wcount);  in tegra_dma_start()
460 	tdc_write(tdc, TEGRA_APBDMA_CHAN_CSR,  in tegra_dma_start()
495 	tdc_write(tdc, TEGRA_APBDMA_CHAN_APBPTR, nsg_req->ch_regs.apb_ptr);  in tegra_dma_configure_for_next()
496 	tdc_write(tdc, TEGRA_APBDMA_CHAN_AHBPTR, nsg_req->ch_regs.ahb_ptr);  in tegra_dma_configure_for_next()
498 		tdc_write(tdc, TEGRA_APBDMA_CHAN_WCOUNT,  in tegra_dma_configure_for_next()
500 	tdc_write(tdc, TEGRA_APBDMA_CHAN_CSR,  in tegra_dma_configure_for_next()
688 		tdc_write(tdc, TEGRA_APBDMA_CHAN_STATUS, status);  in tegra_dma_isr()
1586 		tdc_write(tdc, TEGRA_APBDMA_CHAN_APBSEQ, ch_reg->apb_seq);  in tegra_dma_pm_resume()
1587 		tdc_write(tdc, TEGRA_APBDMA_CHAN_APBPTR, ch_reg->apb_ptr);  in tegra_dma_pm_resume()
1588 		tdc_write(tdc, TEGRA_APBDMA_CHAN_AHBSEQ, ch_reg->ahb_seq);  in tegra_dma_pm_resume()
1589 		tdc_write(tdc, TEGRA_APBDMA_CHAN_AHBPTR, ch_reg->ahb_ptr);  in tegra_dma_pm_resume()
1590 		tdc_write(tdc, TEGRA_APBDMA_CHAN_CSR,  in tegra_dma_pm_resume()