81 	u32 dtadr;	/* DTADR value for the current transfer */  member
239 		seq_printf(s, "\tDTADR = %08x\n", desc->dtadr);  in dbg_show_descriptors()
584 	updater->dtadr = dma + 8;  in set_updater_desc()
599 	return updater->dtadr != (updater->dsadr + 8);  in is_desc_completed()
1008 		hw_desc->dtadr = dma_dst;  in pxad_prep_memcpy()
1028 	u32 dcmd, dsadr = 0, dtadr = 0;  in pxad_prep_slave_sg()  local
1034 	pxad_get_config(chan, dir, &dcmd, &dsadr, &dtadr);  in pxad_prep_slave_sg()
1057 			sw_desc->hw_desc[j++]->dtadr = dtadr ? dtadr : dma;  in pxad_prep_slave_sg()
1077 	u32 dcmd, dsadr = 0, dtadr = 0;  in pxad_prep_dma_cyclic()  local
1092 	pxad_get_config(chan, dir, &dcmd, &dsadr, &dtadr);  in pxad_prep_dma_cyclic()
1110 		phw_desc[0]->dtadr = dtadr ? dtadr : dma;  in pxad_prep_dma_cyclic()
1214 			start = hw_desc->dtadr;  in pxad_residue()