Lines Matching refs:adev
3785 static void ppc440spe_adma_init_capabilities(struct ppc440spe_adma_device *adev) in ppc440spe_adma_init_capabilities() argument
3787 switch (adev->id) { in ppc440spe_adma_init_capabilities()
3790 dma_cap_set(DMA_MEMCPY, adev->common.cap_mask); in ppc440spe_adma_init_capabilities()
3791 dma_cap_set(DMA_INTERRUPT, adev->common.cap_mask); in ppc440spe_adma_init_capabilities()
3792 dma_cap_set(DMA_PQ, adev->common.cap_mask); in ppc440spe_adma_init_capabilities()
3793 dma_cap_set(DMA_PQ_VAL, adev->common.cap_mask); in ppc440spe_adma_init_capabilities()
3794 dma_cap_set(DMA_XOR_VAL, adev->common.cap_mask); in ppc440spe_adma_init_capabilities()
3797 dma_cap_set(DMA_XOR, adev->common.cap_mask); in ppc440spe_adma_init_capabilities()
3798 dma_cap_set(DMA_PQ, adev->common.cap_mask); in ppc440spe_adma_init_capabilities()
3799 dma_cap_set(DMA_INTERRUPT, adev->common.cap_mask); in ppc440spe_adma_init_capabilities()
3800 adev->common.cap_mask = adev->common.cap_mask; in ppc440spe_adma_init_capabilities()
3805 adev->common.device_alloc_chan_resources = in ppc440spe_adma_init_capabilities()
3807 adev->common.device_free_chan_resources = in ppc440spe_adma_init_capabilities()
3809 adev->common.device_tx_status = ppc440spe_adma_tx_status; in ppc440spe_adma_init_capabilities()
3810 adev->common.device_issue_pending = ppc440spe_adma_issue_pending; in ppc440spe_adma_init_capabilities()
3813 if (dma_has_cap(DMA_MEMCPY, adev->common.cap_mask)) { in ppc440spe_adma_init_capabilities()
3814 adev->common.device_prep_dma_memcpy = in ppc440spe_adma_init_capabilities()
3817 if (dma_has_cap(DMA_XOR, adev->common.cap_mask)) { in ppc440spe_adma_init_capabilities()
3818 adev->common.max_xor = XOR_MAX_OPS; in ppc440spe_adma_init_capabilities()
3819 adev->common.device_prep_dma_xor = in ppc440spe_adma_init_capabilities()
3822 if (dma_has_cap(DMA_PQ, adev->common.cap_mask)) { in ppc440spe_adma_init_capabilities()
3823 switch (adev->id) { in ppc440spe_adma_init_capabilities()
3825 dma_set_maxpq(&adev->common, in ppc440spe_adma_init_capabilities()
3829 dma_set_maxpq(&adev->common, in ppc440spe_adma_init_capabilities()
3833 adev->common.max_pq = XOR_MAX_OPS * 3; in ppc440spe_adma_init_capabilities()
3836 adev->common.device_prep_dma_pq = in ppc440spe_adma_init_capabilities()
3839 if (dma_has_cap(DMA_PQ_VAL, adev->common.cap_mask)) { in ppc440spe_adma_init_capabilities()
3840 switch (adev->id) { in ppc440spe_adma_init_capabilities()
3842 adev->common.max_pq = DMA0_FIFO_SIZE / in ppc440spe_adma_init_capabilities()
3846 adev->common.max_pq = DMA1_FIFO_SIZE / in ppc440spe_adma_init_capabilities()
3850 adev->common.device_prep_dma_pq_val = in ppc440spe_adma_init_capabilities()
3853 if (dma_has_cap(DMA_XOR_VAL, adev->common.cap_mask)) { in ppc440spe_adma_init_capabilities()
3854 switch (adev->id) { in ppc440spe_adma_init_capabilities()
3856 adev->common.max_xor = DMA0_FIFO_SIZE / in ppc440spe_adma_init_capabilities()
3860 adev->common.max_xor = DMA1_FIFO_SIZE / in ppc440spe_adma_init_capabilities()
3864 adev->common.device_prep_dma_xor_val = in ppc440spe_adma_init_capabilities()
3867 if (dma_has_cap(DMA_INTERRUPT, adev->common.cap_mask)) { in ppc440spe_adma_init_capabilities()
3868 adev->common.device_prep_dma_interrupt = in ppc440spe_adma_init_capabilities()
3873 dev_name(adev->dev), in ppc440spe_adma_init_capabilities()
3874 dma_has_cap(DMA_PQ, adev->common.cap_mask) ? "pq " : "", in ppc440spe_adma_init_capabilities()
3875 dma_has_cap(DMA_PQ_VAL, adev->common.cap_mask) ? "pq_val " : "", in ppc440spe_adma_init_capabilities()
3876 dma_has_cap(DMA_XOR, adev->common.cap_mask) ? "xor " : "", in ppc440spe_adma_init_capabilities()
3877 dma_has_cap(DMA_XOR_VAL, adev->common.cap_mask) ? "xor_val " : "", in ppc440spe_adma_init_capabilities()
3878 dma_has_cap(DMA_MEMCPY, adev->common.cap_mask) ? "memcpy " : "", in ppc440spe_adma_init_capabilities()
3879 dma_has_cap(DMA_INTERRUPT, adev->common.cap_mask) ? "intr " : ""); in ppc440spe_adma_init_capabilities()
3882 static int ppc440spe_adma_setup_irqs(struct ppc440spe_adma_device *adev, in ppc440spe_adma_setup_irqs() argument
3890 ofdev = container_of(adev->dev, struct platform_device, dev); in ppc440spe_adma_setup_irqs()
3892 if (adev->id != PPC440SPE_XOR_ID) { in ppc440spe_adma_setup_irqs()
3893 adev->err_irq = irq_of_parse_and_map(np, 1); in ppc440spe_adma_setup_irqs()
3894 if (adev->err_irq == NO_IRQ) { in ppc440spe_adma_setup_irqs()
3895 dev_warn(adev->dev, "no err irq resource?\n"); in ppc440spe_adma_setup_irqs()
3897 adev->err_irq = -ENXIO; in ppc440spe_adma_setup_irqs()
3901 adev->err_irq = -ENXIO; in ppc440spe_adma_setup_irqs()
3904 adev->irq = irq_of_parse_and_map(np, 0); in ppc440spe_adma_setup_irqs()
3905 if (adev->irq == NO_IRQ) { in ppc440spe_adma_setup_irqs()
3906 dev_err(adev->dev, "no irq resource\n"); in ppc440spe_adma_setup_irqs()
3911 dev_dbg(adev->dev, "irq %d, err irq %d\n", in ppc440spe_adma_setup_irqs()
3912 adev->irq, adev->err_irq); in ppc440spe_adma_setup_irqs()
3914 ret = request_irq(adev->irq, ppc440spe_adma_eot_handler, in ppc440spe_adma_setup_irqs()
3915 0, dev_driver_string(adev->dev), chan); in ppc440spe_adma_setup_irqs()
3917 dev_err(adev->dev, "can't request irq %d\n", in ppc440spe_adma_setup_irqs()
3918 adev->irq); in ppc440spe_adma_setup_irqs()
3927 if (adev->err_irq > 0) { in ppc440spe_adma_setup_irqs()
3929 ret = request_irq(adev->err_irq, in ppc440spe_adma_setup_irqs()
3932 dev_driver_string(adev->dev), in ppc440spe_adma_setup_irqs()
3935 dev_err(adev->dev, "can't request irq %d\n", in ppc440spe_adma_setup_irqs()
3936 adev->err_irq); in ppc440spe_adma_setup_irqs()
3943 if (adev->id == PPC440SPE_XOR_ID) { in ppc440spe_adma_setup_irqs()
3947 &adev->xor_reg->ier); in ppc440spe_adma_setup_irqs()
3958 adev->i2o_reg = of_iomap(np, 0); in ppc440spe_adma_setup_irqs()
3959 if (!adev->i2o_reg) { in ppc440spe_adma_setup_irqs()
3969 enable = (adev->id == PPC440SPE_DMA0_ID) ? in ppc440spe_adma_setup_irqs()
3972 mask = ioread32(&adev->i2o_reg->iopim) & enable; in ppc440spe_adma_setup_irqs()
3973 iowrite32(mask, &adev->i2o_reg->iopim); in ppc440spe_adma_setup_irqs()
3978 free_irq(adev->irq, chan); in ppc440spe_adma_setup_irqs()
3980 irq_dispose_mapping(adev->irq); in ppc440spe_adma_setup_irqs()
3982 if (adev->err_irq > 0) { in ppc440spe_adma_setup_irqs()
3984 irq_dispose_mapping(adev->err_irq); in ppc440spe_adma_setup_irqs()
3989 static void ppc440spe_adma_release_irqs(struct ppc440spe_adma_device *adev, in ppc440spe_adma_release_irqs() argument
3994 if (adev->id == PPC440SPE_XOR_ID) { in ppc440spe_adma_release_irqs()
3996 mask = ioread32be(&adev->xor_reg->ier); in ppc440spe_adma_release_irqs()
3999 iowrite32be(mask, &adev->xor_reg->ier); in ppc440spe_adma_release_irqs()
4002 disable = (adev->id == PPC440SPE_DMA0_ID) ? in ppc440spe_adma_release_irqs()
4005 mask = ioread32(&adev->i2o_reg->iopim) | disable; in ppc440spe_adma_release_irqs()
4006 iowrite32(mask, &adev->i2o_reg->iopim); in ppc440spe_adma_release_irqs()
4008 free_irq(adev->irq, chan); in ppc440spe_adma_release_irqs()
4009 irq_dispose_mapping(adev->irq); in ppc440spe_adma_release_irqs()
4010 if (adev->err_irq > 0) { in ppc440spe_adma_release_irqs()
4011 free_irq(adev->err_irq, chan); in ppc440spe_adma_release_irqs()
4013 irq_dispose_mapping(adev->err_irq); in ppc440spe_adma_release_irqs()
4014 iounmap(adev->i2o_reg); in ppc440spe_adma_release_irqs()
4026 struct ppc440spe_adma_device *adev; in ppc440spe_adma_probe() local
4085 adev = kzalloc(sizeof(*adev), GFP_KERNEL); in ppc440spe_adma_probe()
4086 if (!adev) { in ppc440spe_adma_probe()
4093 adev->id = id; in ppc440spe_adma_probe()
4094 adev->pool_size = pool_size; in ppc440spe_adma_probe()
4096 adev->dma_desc_pool_virt = dma_alloc_coherent(&ofdev->dev, in ppc440spe_adma_probe()
4097 adev->pool_size, &adev->dma_desc_pool, in ppc440spe_adma_probe()
4099 if (adev->dma_desc_pool_virt == NULL) { in ppc440spe_adma_probe()
4102 adev->pool_size); in ppc440spe_adma_probe()
4108 adev->dma_desc_pool_virt, (u64)adev->dma_desc_pool); in ppc440spe_adma_probe()
4117 if (adev->id == PPC440SPE_XOR_ID) { in ppc440spe_adma_probe()
4118 adev->xor_reg = regs; in ppc440spe_adma_probe()
4120 iowrite32be(XOR_CRSR_XASR_BIT, &adev->xor_reg->crsr); in ppc440spe_adma_probe()
4121 iowrite32be(XOR_CRSR_64BA_BIT, &adev->xor_reg->crrr); in ppc440spe_adma_probe()
4123 size_t fifo_size = (adev->id == PPC440SPE_DMA0_ID) ? in ppc440spe_adma_probe()
4125 adev->dma_reg = regs; in ppc440spe_adma_probe()
4132 &adev->dma_reg->fsiz); in ppc440spe_adma_probe()
4135 &adev->dma_reg->cfg); in ppc440spe_adma_probe()
4137 iowrite32(~0, &adev->dma_reg->dsts); in ppc440spe_adma_probe()
4140 adev->dev = &ofdev->dev; in ppc440spe_adma_probe()
4141 adev->common.dev = &ofdev->dev; in ppc440spe_adma_probe()
4142 INIT_LIST_HEAD(&adev->common.channels); in ppc440spe_adma_probe()
4143 platform_set_drvdata(ofdev, adev); in ppc440spe_adma_probe()
4157 chan->device = adev; in ppc440spe_adma_probe()
4158 chan->common.device = &adev->common; in ppc440spe_adma_probe()
4160 list_add_tail(&chan->common.device_node, &adev->common.channels); in ppc440spe_adma_probe()
4167 if (adev->id != PPC440SPE_XOR_ID) { in ppc440spe_adma_probe()
4196 ret = ppc440spe_adma_setup_irqs(adev, chan, &initcode); in ppc440spe_adma_probe()
4200 ppc440spe_adma_init_capabilities(adev); in ppc440spe_adma_probe()
4202 ret = dma_async_device_register(&adev->common); in ppc440spe_adma_probe()
4212 ppc440spe_adma_release_irqs(adev, chan); in ppc440spe_adma_probe()
4221 if (adev->id != PPC440SPE_XOR_ID) { in ppc440spe_adma_probe()
4232 if (adev->id == PPC440SPE_XOR_ID) in ppc440spe_adma_probe()
4233 iounmap(adev->xor_reg); in ppc440spe_adma_probe()
4235 iounmap(adev->dma_reg); in ppc440spe_adma_probe()
4237 dma_free_coherent(adev->dev, adev->pool_size, in ppc440spe_adma_probe()
4238 adev->dma_desc_pool_virt, in ppc440spe_adma_probe()
4239 adev->dma_desc_pool); in ppc440spe_adma_probe()
4241 kfree(adev); in ppc440spe_adma_probe()
4256 struct ppc440spe_adma_device *adev = platform_get_drvdata(ofdev); in ppc440spe_adma_remove() local
4263 if (adev->id < PPC440SPE_ADMA_ENGINES_NUM) in ppc440spe_adma_remove()
4264 ppc440spe_adma_devices[adev->id] = -1; in ppc440spe_adma_remove()
4266 dma_async_device_unregister(&adev->common); in ppc440spe_adma_remove()
4268 list_for_each_entry_safe(chan, _chan, &adev->common.channels, in ppc440spe_adma_remove()
4271 ppc440spe_adma_release_irqs(adev, ppc440spe_chan); in ppc440spe_adma_remove()
4273 if (adev->id != PPC440SPE_XOR_ID) { in ppc440spe_adma_remove()
4293 dma_free_coherent(adev->dev, adev->pool_size, in ppc440spe_adma_remove()
4294 adev->dma_desc_pool_virt, adev->dma_desc_pool); in ppc440spe_adma_remove()
4295 if (adev->id == PPC440SPE_XOR_ID) in ppc440spe_adma_remove()
4296 iounmap(adev->xor_reg); in ppc440spe_adma_remove()
4298 iounmap(adev->dma_reg); in ppc440spe_adma_remove()
4301 kfree(adev); in ppc440spe_adma_remove()