831 	int addr_count = 0;  in ppc440spe_dma2_pq_slot_count()  local
843 					addr_count++;  in ppc440spe_dma2_pq_slot_count()
849 					addr_count++;  in ppc440spe_dma2_pq_slot_count()
859 				addr_count++;  in ppc440spe_dma2_pq_slot_count()
863 					addr_count++;  in ppc440spe_dma2_pq_slot_count()
867 					addr_count++;  in ppc440spe_dma2_pq_slot_count()
871 					addr_count++;  in ppc440spe_dma2_pq_slot_count()
875 				addr_count++;  in ppc440spe_dma2_pq_slot_count()
881 			addr_count++;  in ppc440spe_dma2_pq_slot_count()
889 			__func__, src_cnt, state, addr_count, order);  in ppc440spe_dma2_pq_slot_count()
895 	return (addr_count + XOR_MAX_OPS - 1) / XOR_MAX_OPS;  in ppc440spe_dma2_pq_slot_count()
3242 	cursor->addr_count++;  in ppc440spe_adma_dma2rxor_inc_addr()
3244 		ppc440spe_desc_set_xor_src_cnt(desc, cursor->addr_count);  in ppc440spe_adma_dma2rxor_inc_addr()
3245 	} else if (cursor->addr_count == XOR_MAX_OPS) {  in ppc440spe_adma_dma2rxor_inc_addr()
3246 		ppc440spe_desc_set_xor_src_cnt(desc, cursor->addr_count);  in ppc440spe_adma_dma2rxor_inc_addr()
3247 		cursor->addr_count = 0;  in ppc440spe_adma_dma2rxor_inc_addr()
3279 					cursor->addr_count,  in ppc440spe_adma_dma2rxor_prep_src()
3288 			set_bit(cursor->addr_count, &desc->reverse_flags[0]);  in ppc440spe_adma_dma2rxor_prep_src()
3291 					cursor->addr_count,  in ppc440spe_adma_dma2rxor_prep_src()
3303 		sign = test_bit(cursor->addr_count,  in ppc440spe_adma_dma2rxor_prep_src()
3312 				cursor->addr_count,  in ppc440spe_adma_dma2rxor_prep_src()
3320 				cursor->addr_count,  in ppc440spe_adma_dma2rxor_prep_src()
3330 				cursor->addr_count,  in ppc440spe_adma_dma2rxor_prep_src()
3340 				cursor->addr_count,  in ppc440spe_adma_dma2rxor_prep_src()
3351 				cursor->addr_count,  in ppc440spe_adma_dma2rxor_prep_src()