942 				    DMA_CUED_XOR_BASE) {  in ppc440spe_adma_device_clear_eot_status()
1877 	xcb->ops[xor_arg_no].h |= DMA_CUED_XOR_BASE;  in ppc440spe_rxor_set_src()
2141 					     DMA_CUED_XOR_BASE, dst[0], 0);  in ppc440spe_dma01_prep_mult()
2167 					     DMA_CUED_XOR_BASE, dst[0], 0);  in ppc440spe_dma01_prep_mult()
2223 		ppc440spe_desc_set_dest_addr(iter, chan, DMA_CUED_XOR_BASE,  in ppc440spe_dma01_prep_sum_product()
2251 		ppc440spe_desc_set_dest_addr(iter, chan, DMA_CUED_XOR_BASE,  in ppc440spe_dma01_prep_sum_product()
2276 		ppc440spe_desc_set_dest_addr(iter, chan, DMA_CUED_XOR_BASE,  in ppc440spe_dma01_prep_sum_product()
2833 	ppc440spe_desc_set_dest_addr(iter, chan, DMA_CUED_XOR_BASE, addr, 0);  in ppc440spe_adma_pq_zero_op()
2890 						DMA_CUED_XOR_BASE, addr, 0);  in ppc440spe_adma_pq_set_dest()
2896 						DMA_CUED_XOR_BASE, paddr, 0);  in ppc440spe_adma_pq_set_dest()
2898 						DMA_CUED_XOR_BASE, qaddr, 1);  in ppc440spe_adma_pq_set_dest()
2933 					DMA_CUED_XOR_BASE |  in ppc440spe_adma_pq_set_dest()
2937 					DMA_CUED_XOR_BASE |  in ppc440spe_adma_pq_set_dest()
2966 							DMA_CUED_XOR_BASE,  in ppc440spe_adma_pq_set_dest()
2976 							DMA_CUED_XOR_BASE,  in ppc440spe_adma_pq_set_dest()
2980 							DMA_CUED_XOR_BASE,  in ppc440spe_adma_pq_set_dest()
2997 				DMA_CUED_XOR_BASE |  in ppc440spe_adma_pq_set_dest()
3002 				DMA_CUED_XOR_BASE |  in ppc440spe_adma_pq_set_dest()
3068 						DMA_CUED_XOR_BASE, paddr, 0);  in ppc440spe_adma_pqzero_sum_set_dest()
3070 						DMA_CUED_XOR_BASE, qaddr, 1);  in ppc440spe_adma_pqzero_sum_set_dest()
3080 						DMA_CUED_XOR_BASE, addr, 0);  in ppc440spe_adma_pqzero_sum_set_dest()
3155 				haddr |= DMA_CUED_XOR_BASE;  in ppc440spe_adma_pq_set_src()