48 	uint32_t ccr;  member
73 	uint32_t ccr;		/* CCR value */  member
299 	omap_dma_chan_write(c, CCR, d->ccr | CCR_ENABLE);  in omap_dma_start()
411 	omap_dma_chan_write(c, CCR, d->ccr);  in omap_dma_start_desc()
413 		omap_dma_chan_write(c, CCR2, d->ccr >> 16);  in omap_dma_start_desc()
562 			c->ccr = CCR_OMAP31_DISABLE;  in omap_dma_alloc_chan_resources()
564 			c->ccr |= c->dma_ch + 1;  in omap_dma_alloc_chan_resources()
566 			c->ccr = c->dma_sig & 0x1f;  in omap_dma_alloc_chan_resources()
569 		c->ccr = c->dma_sig & 0x1f;  in omap_dma_alloc_chan_resources()
570 		c->ccr |= (c->dma_sig & ~0x1f) << 14;  in omap_dma_alloc_chan_resources()
573 		c->ccr |= CCR_BUFFERING_DISABLE;  in omap_dma_alloc_chan_resources()
811 	d->ccr = c->ccr | CCR_SYNC_FRAME;  in omap_dma_prep_slave_sg()
813 		d->ccr |= CCR_DST_AMODE_POSTINC | CCR_SRC_AMODE_CONSTANT;  in omap_dma_prep_slave_sg()
815 		d->ccr |= CCR_DST_AMODE_CONSTANT | CCR_SRC_AMODE_POSTINC;  in omap_dma_prep_slave_sg()
829 			d->ccr |= CCR_TRIGGER_SRC;  in omap_dma_prep_slave_sg()
913 	d->ccr = c->ccr;  in omap_dma_prep_dma_cyclic()
915 		d->ccr |= CCR_DST_AMODE_POSTINC | CCR_SRC_AMODE_CONSTANT;  in omap_dma_prep_dma_cyclic()
917 		d->ccr |= CCR_DST_AMODE_CONSTANT | CCR_SRC_AMODE_POSTINC;  in omap_dma_prep_dma_cyclic()
934 			d->ccr |= CCR_SYNC_PACKET;  in omap_dma_prep_dma_cyclic()
936 			d->ccr |= CCR_SYNC_ELEMENT;  in omap_dma_prep_dma_cyclic()
939 			d->ccr |= CCR_TRIGGER_SRC;  in omap_dma_prep_dma_cyclic()
951 		d->ccr |= CCR_AUTO_INIT | CCR_REPEAT;  in omap_dma_prep_dma_cyclic()
984 	d->ccr = c->ccr;  in omap_dma_prep_dma_memcpy()
985 	d->ccr |= CCR_DST_AMODE_POSTINC | CCR_SRC_AMODE_POSTINC;  in omap_dma_prep_dma_memcpy()