168 	u32 tdcr;  in mmp_tdma_disable_chan()  local
170 	tdcr = readl(tdmac->reg_base + TDCR);  in mmp_tdma_disable_chan()
171 	tdcr |= TDCR_ABR;  in mmp_tdma_disable_chan()
172 	tdcr &= ~TDCR_CHANEN;  in mmp_tdma_disable_chan()
173 	writel(tdcr, tdmac->reg_base + TDCR);  in mmp_tdma_disable_chan()
205 	unsigned int tdcr = 0;  in mmp_tdma_config_chan()  local
210 		tdcr = TDCR_DSTDIR_ADDR_HOLD | TDCR_SRCDIR_ADDR_INC;  in mmp_tdma_config_chan()
212 		tdcr = TDCR_SRCDIR_ADDR_HOLD | TDCR_DSTDIR_ADDR_INC;  in mmp_tdma_config_chan()
215 		tdcr |= TDCR_PACKMOD;  in mmp_tdma_config_chan()
219 			tdcr |= TDCR_BURSTSZ_4B;  in mmp_tdma_config_chan()
222 			tdcr |= TDCR_BURSTSZ_8B;  in mmp_tdma_config_chan()
225 			tdcr |= TDCR_BURSTSZ_16B;  in mmp_tdma_config_chan()
228 			tdcr |= TDCR_BURSTSZ_32B;  in mmp_tdma_config_chan()
231 			tdcr |= TDCR_BURSTSZ_64B;  in mmp_tdma_config_chan()
234 			tdcr |= TDCR_BURSTSZ_128B;  in mmp_tdma_config_chan()
243 			tdcr |= TDCR_SSZ_8_BITS;  in mmp_tdma_config_chan()
246 			tdcr |= TDCR_SSZ_16_BITS;  in mmp_tdma_config_chan()
249 			tdcr |= TDCR_SSZ_32_BITS;  in mmp_tdma_config_chan()
256 		tdcr |= TDCR_SSPMOD;  in mmp_tdma_config_chan()
260 			tdcr |= TDCR_BURSTSZ_SQU_1B;  in mmp_tdma_config_chan()
263 			tdcr |= TDCR_BURSTSZ_SQU_2B;  in mmp_tdma_config_chan()
266 			tdcr |= TDCR_BURSTSZ_SQU_4B;  in mmp_tdma_config_chan()
269 			tdcr |= TDCR_BURSTSZ_SQU_8B;  in mmp_tdma_config_chan()
272 			tdcr |= TDCR_BURSTSZ_SQU_16B;  in mmp_tdma_config_chan()
275 			tdcr |= TDCR_BURSTSZ_SQU_32B;  in mmp_tdma_config_chan()
283 	writel(tdcr, tdmac->reg_base + TDCR);  in mmp_tdma_config_chan()