916 #define IOP_ADMA_NUM_SRC_TEST 4 /* must be <= 15 */  macro
922 	struct page *xor_srcs[IOP_ADMA_NUM_SRC_TEST];  in iop_adma_xor_val_self_test()
923 	struct page *zero_sum_srcs[IOP_ADMA_NUM_SRC_TEST + 1];  in iop_adma_xor_val_self_test()
924 	dma_addr_t dma_srcs[IOP_ADMA_NUM_SRC_TEST + 1];  in iop_adma_xor_val_self_test()
937 	for (src_idx = 0; src_idx < IOP_ADMA_NUM_SRC_TEST; src_idx++) {  in iop_adma_xor_val_self_test()
954 	for (src_idx = 0; src_idx < IOP_ADMA_NUM_SRC_TEST; src_idx++) {  in iop_adma_xor_val_self_test()
960 	for (src_idx = 0; src_idx < IOP_ADMA_NUM_SRC_TEST; src_idx++)  in iop_adma_xor_val_self_test()
979 	for (i = 0; i < IOP_ADMA_NUM_SRC_TEST; i++)  in iop_adma_xor_val_self_test()
983 				   IOP_ADMA_NUM_SRC_TEST, PAGE_SIZE,  in iop_adma_xor_val_self_test()
1018 	for (i = 0; i < IOP_ADMA_NUM_SRC_TEST; i++)  in iop_adma_xor_val_self_test()
1024 	for (i = 0; i < IOP_ADMA_NUM_SRC_TEST + 1; i++)  in iop_adma_xor_val_self_test()
1029 				       IOP_ADMA_NUM_SRC_TEST + 1, PAGE_SIZE,  in iop_adma_xor_val_self_test()
1053 	for (i = 0; i < IOP_ADMA_NUM_SRC_TEST + 1; i++)  in iop_adma_xor_val_self_test()
1058 				       IOP_ADMA_NUM_SRC_TEST + 1, PAGE_SIZE,  in iop_adma_xor_val_self_test()
1083 	src_idx = IOP_ADMA_NUM_SRC_TEST;  in iop_adma_xor_val_self_test()
1095 	struct page *pq[IOP_ADMA_NUM_SRC_TEST+2+2];  in iop_adma_pq_zero_sum_self_test()
1097 	struct page **pq_hw = &pq[IOP_ADMA_NUM_SRC_TEST+2];  in iop_adma_pq_zero_sum_self_test()
1099 	void *pq_sw[IOP_ADMA_NUM_SRC_TEST+2];  in iop_adma_pq_zero_sum_self_test()
1100 	dma_addr_t pq_src[IOP_ADMA_NUM_SRC_TEST+2];  in iop_adma_pq_zero_sum_self_test()
1101 	dma_addr_t *pq_dest = &pq_src[IOP_ADMA_NUM_SRC_TEST];  in iop_adma_pq_zero_sum_self_test()
1123 	for (i = 0; i < IOP_ADMA_NUM_SRC_TEST; i++) {  in iop_adma_pq_zero_sum_self_test()
1147 	for (i = 0; i < IOP_ADMA_NUM_SRC_TEST; i++)  in iop_adma_pq_zero_sum_self_test()
1152 				  IOP_ADMA_NUM_SRC_TEST, (u8 *)raid6_gfexp,  in iop_adma_pq_zero_sum_self_test()
1168 	raid6_call.gen_syndrome(IOP_ADMA_NUM_SRC_TEST+2, PAGE_SIZE, pq_sw);  in iop_adma_pq_zero_sum_self_test()
1170 	if (memcmp(pq_sw[IOP_ADMA_NUM_SRC_TEST],  in iop_adma_pq_zero_sum_self_test()
1176 	if (memcmp(pq_sw[IOP_ADMA_NUM_SRC_TEST+1],  in iop_adma_pq_zero_sum_self_test()
1184 	for (i = 0; i < IOP_ADMA_NUM_SRC_TEST + 2; i++)  in iop_adma_pq_zero_sum_self_test()
1189 	tx = iop_adma_prep_dma_pq_val(dma_chan, &pq_src[IOP_ADMA_NUM_SRC_TEST],  in iop_adma_pq_zero_sum_self_test()
1190 				      pq_src, IOP_ADMA_NUM_SRC_TEST,  in iop_adma_pq_zero_sum_self_test()
1213 	i = IOP_ADMA_NUM_SRC_TEST;  in iop_adma_pq_zero_sum_self_test()
1216 	for (i = 0; i < IOP_ADMA_NUM_SRC_TEST + 2; i++)  in iop_adma_pq_zero_sum_self_test()
1221 	tx = iop_adma_prep_dma_pq_val(dma_chan, &pq_src[IOP_ADMA_NUM_SRC_TEST],  in iop_adma_pq_zero_sum_self_test()
1222 				      pq_src, IOP_ADMA_NUM_SRC_TEST,  in iop_adma_pq_zero_sum_self_test()