772 #define IOAT_NUM_SRC_TEST 6 /* must be <= 8 */  macro
777 	struct page *xor_srcs[IOAT_NUM_SRC_TEST];  in ioat_xor_val_self_test()
778 	struct page *xor_val_srcs[IOAT_NUM_SRC_TEST + 1];  in ioat_xor_val_self_test()
779 	dma_addr_t dma_srcs[IOAT_NUM_SRC_TEST + 1];  in ioat_xor_val_self_test()
799 	for (src_idx = 0; src_idx < IOAT_NUM_SRC_TEST; src_idx++) {  in ioat_xor_val_self_test()
816 	for (src_idx = 0; src_idx < IOAT_NUM_SRC_TEST; src_idx++) {  in ioat_xor_val_self_test()
823 	for (src_idx = 0; src_idx < IOAT_NUM_SRC_TEST; src_idx++)  in ioat_xor_val_self_test()
845 	for (i = 0; i < IOAT_NUM_SRC_TEST; i++)  in ioat_xor_val_self_test()
847 	for (i = 0; i < IOAT_NUM_SRC_TEST; i++) {  in ioat_xor_val_self_test()
854 				      IOAT_NUM_SRC_TEST, PAGE_SIZE,  in ioat_xor_val_self_test()
884 	for (i = 0; i < IOAT_NUM_SRC_TEST; i++)  in ioat_xor_val_self_test()
908 	for (i = 0; i < IOAT_NUM_SRC_TEST; i++)  in ioat_xor_val_self_test()
914 	for (i = 0; i < IOAT_NUM_SRC_TEST + 1; i++)  in ioat_xor_val_self_test()
916 	for (i = 0; i < IOAT_NUM_SRC_TEST + 1; i++) {  in ioat_xor_val_self_test()
923 					  IOAT_NUM_SRC_TEST + 1, PAGE_SIZE,  in ioat_xor_val_self_test()
952 	for (i = 0; i < IOAT_NUM_SRC_TEST + 1; i++)  in ioat_xor_val_self_test()
967 	for (i = 0; i < IOAT_NUM_SRC_TEST + 1; i++)  in ioat_xor_val_self_test()
969 	for (i = 0; i < IOAT_NUM_SRC_TEST + 1; i++) {  in ioat_xor_val_self_test()
976 					  IOAT_NUM_SRC_TEST + 1, PAGE_SIZE,  in ioat_xor_val_self_test()
1011 	for (i = 0; i < IOAT_NUM_SRC_TEST + 1; i++)  in ioat_xor_val_self_test()
1020 		for (i = 0; i < IOAT_NUM_SRC_TEST; i++)  in ioat_xor_val_self_test()
1025 		for (i = 0; i < IOAT_NUM_SRC_TEST + 1; i++)  in ioat_xor_val_self_test()
1033 	src_idx = IOAT_NUM_SRC_TEST;  in ioat_xor_val_self_test()