Lines Matching refs:writel_relaxed
556 writel_relaxed(evt, sdma->regs + SDMA_H_EVTOVR); in sdma_config_ownership()
557 writel_relaxed(mcu, sdma->regs + SDMA_H_HOSTOVR); in sdma_config_ownership()
558 writel_relaxed(dsp, sdma->regs + SDMA_H_DSPOVR); in sdma_config_ownership()
586 writel_relaxed(ret, sdma->regs + SDMA_H_INTR); in sdma_run_channel0()
593 writel_relaxed(SDMA_H_CONFIG_CSM, sdma->regs + SDMA_H_CONFIG); in sdma_run_channel0()
642 writel_relaxed(val, sdma->regs + chnenbl); in sdma_event_enable()
654 writel_relaxed(val, sdma->regs + chnenbl); in sdma_event_disable()
732 writel_relaxed(stat, sdma->regs + SDMA_H_INTR); in sdma_int_handler()
908 writel_relaxed(BIT(channel), sdma->regs + SDMA_H_STATSTOP); in sdma_disable_channel()
1027 writel_relaxed(priority, sdma->regs + SDMA_CHNPRI_0 + 4 * channel); in sdma_set_channel_priority()
1554 writel_relaxed(0, sdma->regs + SDMA_H_C0PTR); in sdma_init()
1577 writel_relaxed(0, sdma->regs + chnenbl_ofs(sdma, i)); in sdma_init()
1581 writel_relaxed(0, sdma->regs + SDMA_CHNPRI_0 + i * 4); in sdma_init()
1590 writel_relaxed(0x4050, sdma->regs + SDMA_CHN0ADDR); in sdma_init()
1594 writel_relaxed(0, sdma->regs + SDMA_H_CONFIG); in sdma_init()
1596 writel_relaxed(ccb_phys, sdma->regs + SDMA_H_C0PTR); in sdma_init()