307 static void m2p_set_control(struct ep93xx_dma_chan *edmac, u32 control)  in m2p_set_control()  argument
309 	writel(control, edmac->regs + M2P_CONTROL);  in m2p_set_control()
320 	u32 control;  in m2p_hw_setup()  local
324 	control = M2P_CONTROL_CH_ERROR_INT | M2P_CONTROL_ICE  in m2p_hw_setup()
326 	m2p_set_control(edmac, control);  in m2p_hw_setup()
338 	u32 control;  in m2p_hw_shutdown()  local
340 	control = readl(edmac->regs + M2P_CONTROL);  in m2p_hw_shutdown()
341 	control &= ~(M2P_CONTROL_STALLINT | M2P_CONTROL_NFBINT);  in m2p_hw_shutdown()
342 	m2p_set_control(edmac, control);  in m2p_hw_shutdown()
382 	u32 control = readl(edmac->regs + M2P_CONTROL);  in m2p_hw_submit()  local
385 	control |= M2P_CONTROL_STALLINT;  in m2p_hw_submit()
389 		control |= M2P_CONTROL_NFBINT;  in m2p_hw_submit()
392 	m2p_set_control(edmac, control);  in m2p_hw_submit()
398 	u32 control;  in m2p_hw_interrupt()  local
427 		control = readl(edmac->regs + M2P_CONTROL);  in m2p_hw_interrupt()
428 		control &= ~(M2P_CONTROL_STALLINT | M2P_CONTROL_NFBINT);  in m2p_hw_interrupt()
429 		m2p_set_control(edmac, control);  in m2p_hw_interrupt()
450 	u32 control = 0;  in m2m_hw_setup()  local
454 		writel(control, edmac->regs + M2M_CONTROL);  in m2m_hw_setup()
465 		control = (5 << M2M_CONTROL_PWSC_SHIFT);  in m2m_hw_setup()
466 		control |= M2M_CONTROL_NO_HDSK;  in m2m_hw_setup()
469 			control |= M2M_CONTROL_DAH;  in m2m_hw_setup()
470 			control |= M2M_CONTROL_TM_TX;  in m2m_hw_setup()
471 			control |= M2M_CONTROL_RSS_SSPTX;  in m2m_hw_setup()
473 			control |= M2M_CONTROL_SAH;  in m2m_hw_setup()
474 			control |= M2M_CONTROL_TM_RX;  in m2m_hw_setup()
475 			control |= M2M_CONTROL_RSS_SSPRX;  in m2m_hw_setup()
486 			control = (3 << M2M_CONTROL_PWSC_SHIFT);  in m2m_hw_setup()
487 			control |= M2M_CONTROL_DAH;  in m2m_hw_setup()
488 			control |= M2M_CONTROL_TM_TX;  in m2m_hw_setup()
490 			control = (2 << M2M_CONTROL_PWSC_SHIFT);  in m2m_hw_setup()
491 			control |= M2M_CONTROL_SAH;  in m2m_hw_setup()
492 			control |= M2M_CONTROL_TM_RX;  in m2m_hw_setup()
495 		control |= M2M_CONTROL_NO_HDSK;  in m2m_hw_setup()
496 		control |= M2M_CONTROL_RSS_IDE;  in m2m_hw_setup()
497 		control |= M2M_CONTROL_PW_16;  in m2m_hw_setup()
504 	writel(control, edmac->regs + M2M_CONTROL);  in m2m_hw_setup()
540 	u32 control = readl(edmac->regs + M2M_CONTROL);  in m2m_hw_submit()  local
547 	control &= ~M2M_CONTROL_PW_MASK;  in m2m_hw_submit()
548 	control |= edmac->runtime_ctrl;  in m2m_hw_submit()
551 	control |= M2M_CONTROL_DONEINT;  in m2m_hw_submit()
555 		control |= M2M_CONTROL_NFBINT;  in m2m_hw_submit()
562 	control |= M2M_CONTROL_ENABLE;  in m2m_hw_submit()
563 	writel(control, edmac->regs + M2M_CONTROL);  in m2m_hw_submit()
570 		control |= M2M_CONTROL_START;  in m2m_hw_submit()
571 		writel(control, edmac->regs + M2M_CONTROL);  in m2m_hw_submit()
592 	u32 control;  in m2m_hw_interrupt()  local
629 				control = readl(edmac->regs + M2M_CONTROL);  in m2m_hw_interrupt()
630 				control |= M2M_CONTROL_START;  in m2m_hw_interrupt()
631 				writel(control, edmac->regs + M2M_CONTROL);  in m2m_hw_interrupt()
647 		control = readl(edmac->regs + M2M_CONTROL);  in m2m_hw_interrupt()
648 		control &= ~(M2M_CONTROL_DONEINT | M2M_CONTROL_NFBINT  in m2m_hw_interrupt()
650 		writel(control, edmac->regs + M2M_CONTROL);  in m2m_hw_interrupt()