247 	struct at_xdmac_lld		lld;  member
365 	else if (first->lld.mbr_ubc & AT_XDMAC_MBR_UBC_NDV3)  in at_xdmac_start_xfer()
375 	at_xdmac_chan_write(atchan, AT_XDMAC_CC, first->lld.mbr_cfg);  in at_xdmac_start_xfer()
461 	memset(&desc->lld, 0, sizeof(desc->lld));  in at_xdmac_init_used_desc()
492 	prev->lld.mbr_nda = desc->tx_dma_desc.phys;  in at_xdmac_queue_desc()
493 	prev->lld.mbr_ubc |= AT_XDMAC_MBR_UBC_NDE;  in at_xdmac_queue_desc()
496 		__func__, prev, &prev->lld.mbr_nda);  in at_xdmac_queue_desc()
505 	desc->lld.mbr_bc++;  in at_xdmac_increment_block_count()
689 			desc->lld.mbr_sa = atchan->sconfig.src_addr;  in at_xdmac_prep_slave_sg()
690 			desc->lld.mbr_da = mem;  in at_xdmac_prep_slave_sg()
692 			desc->lld.mbr_sa = mem;  in at_xdmac_prep_slave_sg()
693 			desc->lld.mbr_da = atchan->sconfig.dst_addr;  in at_xdmac_prep_slave_sg()
699 		desc->lld.mbr_ubc = AT_XDMAC_MBR_UBC_NDV2			/* next descriptor view */  in at_xdmac_prep_slave_sg()
703 		desc->lld.mbr_cfg = (atchan->cfg & ~AT_XDMAC_CC_DWIDTH_MASK) |  in at_xdmac_prep_slave_sg()
707 			 __func__, &desc->lld.mbr_sa, &desc->lld.mbr_da, desc->lld.mbr_ubc);  in at_xdmac_prep_slave_sg()
781 			desc->lld.mbr_sa = atchan->sconfig.src_addr;  in at_xdmac_prep_dma_cyclic()
782 			desc->lld.mbr_da = buf_addr + i * period_len;  in at_xdmac_prep_dma_cyclic()
784 			desc->lld.mbr_sa = buf_addr + i * period_len;  in at_xdmac_prep_dma_cyclic()
785 			desc->lld.mbr_da = atchan->sconfig.dst_addr;  in at_xdmac_prep_dma_cyclic()
787 		desc->lld.mbr_cfg = atchan->cfg;  in at_xdmac_prep_dma_cyclic()
788 		desc->lld.mbr_ubc = AT_XDMAC_MBR_UBC_NDV1  in at_xdmac_prep_dma_cyclic()
791 			| period_len >> at_xdmac_get_dwidth(desc->lld.mbr_cfg);  in at_xdmac_prep_dma_cyclic()
795 			 __func__, &desc->lld.mbr_sa, &desc->lld.mbr_da, desc->lld.mbr_ubc);  in at_xdmac_prep_dma_cyclic()
912 	desc->lld.mbr_sa = src;  in at_xdmac_interleaved_queue_desc()
913 	desc->lld.mbr_da = dst;  in at_xdmac_interleaved_queue_desc()
914 	desc->lld.mbr_sus = dmaengine_get_src_icg(xt, chunk);  in at_xdmac_interleaved_queue_desc()
915 	desc->lld.mbr_dus = dmaengine_get_dst_icg(xt, chunk);  in at_xdmac_interleaved_queue_desc()
917 	desc->lld.mbr_ubc = AT_XDMAC_MBR_UBC_NDV3  in at_xdmac_interleaved_queue_desc()
921 	desc->lld.mbr_cfg = chan_cc;  in at_xdmac_interleaved_queue_desc()
925 		__func__, &desc->lld.mbr_sa, &desc->lld.mbr_da,  in at_xdmac_interleaved_queue_desc()
926 		desc->lld.mbr_ubc, desc->lld.mbr_cfg);  in at_xdmac_interleaved_queue_desc()
1098 		desc->lld.mbr_sa = src_addr;  in at_xdmac_prep_dma_memcpy()
1099 		desc->lld.mbr_da = dst_addr;  in at_xdmac_prep_dma_memcpy()
1100 		desc->lld.mbr_ubc = AT_XDMAC_MBR_UBC_NDV2  in at_xdmac_prep_dma_memcpy()
1104 		desc->lld.mbr_cfg = chan_cc;  in at_xdmac_prep_dma_memcpy()
1108 			 __func__, &desc->lld.mbr_sa, &desc->lld.mbr_da, desc->lld.mbr_ubc, desc->lld.mbr_cfg);  in at_xdmac_prep_dma_memcpy()
1177 	desc->lld.mbr_da = dst_addr;  in at_xdmac_memset_create_desc()
1178 	desc->lld.mbr_ds = value;  in at_xdmac_memset_create_desc()
1179 	desc->lld.mbr_ubc = AT_XDMAC_MBR_UBC_NDV3  in at_xdmac_memset_create_desc()
1183 	desc->lld.mbr_cfg = chan_cc;  in at_xdmac_memset_create_desc()
1187 		__func__, &desc->lld.mbr_da, &desc->lld.mbr_ds, desc->lld.mbr_ubc,  in at_xdmac_memset_create_desc()
1188 		desc->lld.mbr_cfg);  in at_xdmac_memset_create_desc()
1287 				ppdesc->lld.mbr_dus = stride;  in at_xdmac_prep_dma_memset_sg()
1350 			pdesc->lld.mbr_dus = stride;  in at_xdmac_prep_dma_memset_sg()
1419 	if ((desc->lld.mbr_cfg & mask) == value) {  in at_xdmac_tx_status()
1468 		dwidth = at_xdmac_get_dwidth(desc->lld.mbr_cfg);  in at_xdmac_tx_status()
1469 		residue -= (desc->lld.mbr_ubc & 0xffffff) << dwidth;  in at_xdmac_tx_status()
1470 		if ((desc->lld.mbr_nda & 0xfffffffc) == cur_nda)  in at_xdmac_tx_status()