153 	void __iomem *reg_config;  member
357 	val = readl(ch->reg_config);  in pl08x_phy_channel_busy()
387 	writel(ccfg, phychan->reg_config);  in pl08x_write_lli()
420 	val = readl(phychan->reg_config);  in pl08x_start_next_txd()
422 		val = readl(phychan->reg_config);  in pl08x_start_next_txd()
424 	writel(val | PL080_CONFIG_ENABLE, phychan->reg_config);  in pl08x_start_next_txd()
443 	val = readl(ch->reg_config);  in pl08x_pause_phy_chan()
445 	writel(val, ch->reg_config);  in pl08x_pause_phy_chan()
462 	val = readl(ch->reg_config);  in pl08x_resume_phy_chan()
464 	writel(val, ch->reg_config);  in pl08x_resume_phy_chan()
476 	u32 val = readl(ch->reg_config);  in pl08x_terminate_phy_chan()
481 	writel(val, ch->reg_config);  in pl08x_terminate_phy_chan()
2349 		ch->reg_config = ch->base + vd->config_offset;  in pl08x_probe()
2360 			val = readl(ch->reg_config);  in pl08x_probe()