Lines Matching refs:cctl
191 u32 cctl; member
487 static inline u32 get_bytes_in_cctl(u32 cctl) in get_bytes_in_cctl() argument
490 u32 bytes = cctl & PL080_CONTROL_TRANSFER_SIZE_MASK; in get_bytes_in_cctl()
492 cctl &= PL080_CONTROL_SWIDTH_MASK; in get_bytes_in_cctl()
494 switch (cctl >> PL080_CONTROL_SWIDTH_SHIFT) { in get_bytes_in_cctl()
507 static inline u32 get_bytes_in_cctl_pl080s(u32 cctl, u32 cctl1) in get_bytes_in_cctl_pl080s() argument
512 cctl &= PL080_CONTROL_SWIDTH_MASK; in get_bytes_in_cctl_pl080s()
514 switch (cctl >> PL080_CONTROL_SWIDTH_SHIFT) { in get_bytes_in_cctl_pl080s()
759 static inline u32 pl08x_cctl_bits(u32 cctl, u8 srcwidth, u8 dstwidth, in pl08x_cctl_bits() argument
762 u32 retbits = cctl; in pl08x_cctl_bits()
823 struct pl08x_bus_data **mbus, struct pl08x_bus_data **sbus, u32 cctl) in pl08x_choose_master_bus() argument
825 if (!(cctl & PL080_CONTROL_DST_INCR)) { in pl08x_choose_master_bus()
828 } else if (!(cctl & PL080_CONTROL_SRC_INCR)) { in pl08x_choose_master_bus()
847 int num_llis, int len, u32 cctl, u32 cctl2) in pl08x_fill_lli_for_desc() argument
862 llis_va[PL080_LLI_CCTL] = cctl; in pl08x_fill_lli_for_desc()
866 if (cctl & PL080_CONTROL_SRC_INCR) in pl08x_fill_lli_for_desc()
868 if (cctl & PL080_CONTROL_DST_INCR) in pl08x_fill_lli_for_desc()
877 struct pl08x_lli_build_data *bd, u32 *cctl, u32 len, in prep_byte_width_lli() argument
880 *cctl = pl08x_cctl_bits(*cctl, 1, 1, len); in prep_byte_width_lli()
881 pl08x_fill_lli_for_desc(pl08x, bd, num_llis, len, *cctl, len); in prep_byte_width_lli()
934 u32 cctl, early_bytes = 0; in pl08x_fill_llis_for_desc() local
947 cctl = txd->cctl; in pl08x_fill_llis_for_desc()
951 pl08x_get_bytes_for_cctl((cctl & PL080_CONTROL_SWIDTH_MASK) >> in pl08x_fill_llis_for_desc()
956 pl08x_get_bytes_for_cctl((cctl & PL080_CONTROL_DWIDTH_MASK) >> in pl08x_fill_llis_for_desc()
961 cctl = txd->cctl; in pl08x_fill_llis_for_desc()
969 pl08x_choose_master_bus(&bd, &mbus, &sbus, cctl); in pl08x_fill_llis_for_desc()
974 cctl & PL080_CONTROL_SRC_INCR ? "+" : "", in pl08x_fill_llis_for_desc()
977 cctl & PL080_CONTROL_DST_INCR ? "+" : "", in pl08x_fill_llis_for_desc()
1024 cctl = pl08x_cctl_bits(cctl, bd.srcbus.buswidth, in pl08x_fill_llis_for_desc()
1027 0, cctl, 0); in pl08x_fill_llis_for_desc()
1049 prep_byte_width_lli(pl08x, &bd, &cctl, early_bytes, in pl08x_fill_llis_for_desc()
1104 cctl = pl08x_cctl_bits(cctl, bd.srcbus.buswidth, in pl08x_fill_llis_for_desc()
1107 lli_len, cctl, tsize); in pl08x_fill_llis_for_desc()
1118 prep_byte_width_lli(pl08x, &bd, &cctl, in pl08x_fill_llis_for_desc()
1316 u32 cctl = 0; in pl08x_select_bus() local
1319 cctl |= PL080_CONTROL_DST_AHB2; in pl08x_select_bus()
1321 cctl |= PL080_CONTROL_SRC_AHB2; in pl08x_select_bus()
1323 return cctl; in pl08x_select_bus()
1326 static u32 pl08x_cctl(u32 cctl) in pl08x_cctl() argument
1328 cctl &= ~(PL080_CONTROL_SRC_AHB2 | PL080_CONTROL_DST_AHB2 | in pl08x_cctl()
1333 return cctl | PL080_CONTROL_PROT_SYS; in pl08x_cctl()
1364 u32 width, burst, cctl = 0; in pl08x_get_cctl() local
1370 cctl |= width << PL080_CONTROL_SWIDTH_SHIFT; in pl08x_get_cctl()
1371 cctl |= width << PL080_CONTROL_DWIDTH_SHIFT; in pl08x_get_cctl()
1382 cctl |= burst << PL080_CONTROL_SB_SIZE_SHIFT; in pl08x_get_cctl()
1383 cctl |= burst << PL080_CONTROL_DB_SIZE_SHIFT; in pl08x_get_cctl()
1385 return pl08x_cctl(cctl); in pl08x_get_cctl()
1454 txd->cctl = pl08x->pd->memcpy_channel.cctl_memcpy & in pl08x_prep_dma_memcpy()
1458 txd->cctl |= PL080_CONTROL_SRC_INCR | PL080_CONTROL_DST_INCR; in pl08x_prep_dma_memcpy()
1461 txd->cctl |= pl08x_select_bus(pl08x->mem_buses, in pl08x_prep_dma_memcpy()
1484 u32 maxburst, cctl; in pl08x_init_txd() local
1498 cctl = PL080_CONTROL_SRC_INCR; in pl08x_init_txd()
1505 cctl = PL080_CONTROL_DST_INCR; in pl08x_init_txd()
1518 cctl |= pl08x_get_cctl(plchan, addr_width, maxburst); in pl08x_init_txd()
1519 if (cctl == ~0) { in pl08x_init_txd()
1526 txd->cctl = cctl | pl08x_select_bus(src_buses, dst_buses); in pl08x_init_txd()
1648 txd->cctl |= PL080_CONTROL_TC_IRQ_EN; in pl08x_prep_dma_cyclic()