Lines Matching refs:tmp
294 unsigned int tmp; in exynos4210_set_busclk() local
304 tmp = data->dmc_divtable[index]; in exynos4210_set_busclk()
306 __raw_writel(tmp, EXYNOS4_CLKDIV_DMC0); in exynos4210_set_busclk()
309 tmp = __raw_readl(EXYNOS4_CLKDIV_STAT_DMC0); in exynos4210_set_busclk()
310 } while (tmp & 0x11111111); in exynos4210_set_busclk()
313 tmp = data->top_divtable[index]; in exynos4210_set_busclk()
315 __raw_writel(tmp, EXYNOS4_CLKDIV_TOP); in exynos4210_set_busclk()
318 tmp = __raw_readl(EXYNOS4_CLKDIV_STAT_TOP); in exynos4210_set_busclk()
319 } while (tmp & 0x11111); in exynos4210_set_busclk()
322 tmp = __raw_readl(EXYNOS4_CLKDIV_LEFTBUS); in exynos4210_set_busclk()
324 tmp &= ~(EXYNOS4_CLKDIV_BUS_GDLR_MASK | EXYNOS4_CLKDIV_BUS_GPLR_MASK); in exynos4210_set_busclk()
326 tmp |= ((exynos4210_clkdiv_lr_bus[index][0] << in exynos4210_set_busclk()
331 __raw_writel(tmp, EXYNOS4_CLKDIV_LEFTBUS); in exynos4210_set_busclk()
334 tmp = __raw_readl(EXYNOS4_CLKDIV_STAT_LEFTBUS); in exynos4210_set_busclk()
335 } while (tmp & 0x11); in exynos4210_set_busclk()
338 tmp = __raw_readl(EXYNOS4_CLKDIV_RIGHTBUS); in exynos4210_set_busclk()
340 tmp &= ~(EXYNOS4_CLKDIV_BUS_GDLR_MASK | EXYNOS4_CLKDIV_BUS_GPLR_MASK); in exynos4210_set_busclk()
342 tmp |= ((exynos4210_clkdiv_lr_bus[index][0] << in exynos4210_set_busclk()
347 __raw_writel(tmp, EXYNOS4_CLKDIV_RIGHTBUS); in exynos4210_set_busclk()
350 tmp = __raw_readl(EXYNOS4_CLKDIV_STAT_RIGHTBUS); in exynos4210_set_busclk()
351 } while (tmp & 0x11); in exynos4210_set_busclk()
360 unsigned int tmp; in exynos4x12_set_busclk() local
370 tmp = data->dmc_divtable[index]; in exynos4x12_set_busclk()
372 __raw_writel(tmp, EXYNOS4_CLKDIV_DMC0); in exynos4x12_set_busclk()
375 tmp = __raw_readl(EXYNOS4_CLKDIV_STAT_DMC0); in exynos4x12_set_busclk()
376 } while (tmp & 0x11111111); in exynos4x12_set_busclk()
379 tmp = __raw_readl(EXYNOS4_CLKDIV_DMC1); in exynos4x12_set_busclk()
381 tmp &= ~(EXYNOS4_CLKDIV_DMC1_G2D_ACP_MASK | in exynos4x12_set_busclk()
385 tmp |= ((exynos4x12_clkdiv_dmc1[index][0] << in exynos4x12_set_busclk()
392 __raw_writel(tmp, EXYNOS4_CLKDIV_DMC1); in exynos4x12_set_busclk()
395 tmp = __raw_readl(EXYNOS4_CLKDIV_STAT_DMC1); in exynos4x12_set_busclk()
396 } while (tmp & 0x111111); in exynos4x12_set_busclk()
399 tmp = __raw_readl(EXYNOS4_CLKDIV_TOP); in exynos4x12_set_busclk()
401 tmp &= ~(EXYNOS4_CLKDIV_TOP_ACLK266_GPS_MASK | in exynos4x12_set_busclk()
407 tmp |= ((exynos4x12_clkdiv_top[index][0] << in exynos4x12_set_busclk()
418 __raw_writel(tmp, EXYNOS4_CLKDIV_TOP); in exynos4x12_set_busclk()
421 tmp = __raw_readl(EXYNOS4_CLKDIV_STAT_TOP); in exynos4x12_set_busclk()
422 } while (tmp & 0x11111); in exynos4x12_set_busclk()
425 tmp = __raw_readl(EXYNOS4_CLKDIV_LEFTBUS); in exynos4x12_set_busclk()
427 tmp &= ~(EXYNOS4_CLKDIV_BUS_GDLR_MASK | EXYNOS4_CLKDIV_BUS_GPLR_MASK); in exynos4x12_set_busclk()
429 tmp |= ((exynos4x12_clkdiv_lr_bus[index][0] << in exynos4x12_set_busclk()
434 __raw_writel(tmp, EXYNOS4_CLKDIV_LEFTBUS); in exynos4x12_set_busclk()
437 tmp = __raw_readl(EXYNOS4_CLKDIV_STAT_LEFTBUS); in exynos4x12_set_busclk()
438 } while (tmp & 0x11); in exynos4x12_set_busclk()
441 tmp = __raw_readl(EXYNOS4_CLKDIV_RIGHTBUS); in exynos4x12_set_busclk()
443 tmp &= ~(EXYNOS4_CLKDIV_BUS_GDLR_MASK | EXYNOS4_CLKDIV_BUS_GPLR_MASK); in exynos4x12_set_busclk()
445 tmp |= ((exynos4x12_clkdiv_lr_bus[index][0] << in exynos4x12_set_busclk()
450 __raw_writel(tmp, EXYNOS4_CLKDIV_RIGHTBUS); in exynos4x12_set_busclk()
453 tmp = __raw_readl(EXYNOS4_CLKDIV_STAT_RIGHTBUS); in exynos4x12_set_busclk()
454 } while (tmp & 0x11); in exynos4x12_set_busclk()
457 tmp = __raw_readl(EXYNOS4_CLKDIV_MFC); in exynos4x12_set_busclk()
459 tmp &= ~(EXYNOS4_CLKDIV_MFC_MASK); in exynos4x12_set_busclk()
461 tmp |= ((exynos4x12_clkdiv_sclkip[index][0] << in exynos4x12_set_busclk()
464 __raw_writel(tmp, EXYNOS4_CLKDIV_MFC); in exynos4x12_set_busclk()
467 tmp = __raw_readl(EXYNOS4_CLKDIV_STAT_MFC); in exynos4x12_set_busclk()
468 } while (tmp & 0x1); in exynos4x12_set_busclk()
471 tmp = __raw_readl(EXYNOS4_CLKDIV_CAM1); in exynos4x12_set_busclk()
473 tmp &= ~(EXYNOS4_CLKDIV_CAM1_JPEG_MASK); in exynos4x12_set_busclk()
475 tmp |= ((exynos4x12_clkdiv_sclkip[index][1] << in exynos4x12_set_busclk()
478 __raw_writel(tmp, EXYNOS4_CLKDIV_CAM1); in exynos4x12_set_busclk()
481 tmp = __raw_readl(EXYNOS4_CLKDIV_STAT_CAM1); in exynos4x12_set_busclk()
482 } while (tmp & 0x1); in exynos4x12_set_busclk()
485 tmp = __raw_readl(EXYNOS4_CLKDIV_CAM); in exynos4x12_set_busclk()
487 tmp &= ~(EXYNOS4_CLKDIV_CAM_FIMC0_MASK | EXYNOS4_CLKDIV_CAM_FIMC1_MASK | in exynos4x12_set_busclk()
490 tmp |= ((exynos4x12_clkdiv_sclkip[index][2] << in exynos4x12_set_busclk()
499 __raw_writel(tmp, EXYNOS4_CLKDIV_CAM); in exynos4x12_set_busclk()
502 tmp = __raw_readl(EXYNOS4_CLKDIV_STAT_CAM1); in exynos4x12_set_busclk()
503 } while (tmp & 0x1111); in exynos4x12_set_busclk()
525 int err = 0, tmp; in exynos4_bus_setvolt() local
541 tmp = exynos4x12_get_intspec(oppi->rate); in exynos4_bus_setvolt()
542 if (tmp < 0) { in exynos4_bus_setvolt()
543 err = tmp; in exynos4_bus_setvolt()
550 exynos4x12_intclk_table[tmp].volt, in exynos4_bus_setvolt()
664 u32 tmp; in exynos4210_init_tables() local
668 tmp = __raw_readl(EXYNOS4_CLKDIV_DMC0); in exynos4210_init_tables()
670 tmp &= ~(EXYNOS4_CLKDIV_DMC0_ACP_MASK | in exynos4210_init_tables()
679 tmp |= ((exynos4210_clkdiv_dmc0[i][0] << in exynos4210_init_tables()
696 data->dmc_divtable[i] = tmp; in exynos4210_init_tables()
699 tmp = __raw_readl(EXYNOS4_CLKDIV_TOP); in exynos4210_init_tables()
701 tmp &= ~(EXYNOS4_CLKDIV_TOP_ACLK200_MASK | in exynos4210_init_tables()
707 tmp |= ((exynos4210_clkdiv_top[i][0] << in exynos4210_init_tables()
718 data->top_divtable[i] = tmp; in exynos4210_init_tables()
725 tmp = 0; /* Max voltages for the reliability of the unknown */ in exynos4210_init_tables()
727 pr_debug("ASV Group of Exynos4 is %d\n", tmp); in exynos4210_init_tables()
729 switch (tmp) { in exynos4210_init_tables()
772 unsigned int tmp; in exynos4x12_init_tables() local
776 tmp = __raw_readl(EXYNOS4_DMC_PAUSE_CTRL); in exynos4x12_init_tables()
777 tmp |= EXYNOS4_DMC_PAUSE_ENABLE; in exynos4x12_init_tables()
778 __raw_writel(tmp, EXYNOS4_DMC_PAUSE_CTRL); in exynos4x12_init_tables()
780 tmp = __raw_readl(EXYNOS4_CLKDIV_DMC0); in exynos4x12_init_tables()
783 tmp &= ~(EXYNOS4_CLKDIV_DMC0_ACP_MASK | in exynos4x12_init_tables()
790 tmp |= ((exynos4x12_clkdiv_dmc0[i][0] << in exynos4x12_init_tables()
803 data->dmc_divtable[i] = tmp; in exynos4x12_init_tables()
806 tmp = 0; /* Max voltages for the reliability of the unknown */ in exynos4x12_init_tables()
808 if (tmp > 8) in exynos4x12_init_tables()
809 tmp = 0; in exynos4x12_init_tables()
810 pr_debug("ASV Group of Exynos4x12 is %d\n", tmp); in exynos4x12_init_tables()
814 exynos4x12_mif_step_50[tmp][i]; in exynos4x12_init_tables()
816 exynos4x12_int_volt[tmp][i]; in exynos4x12_init_tables()