686 static inline void hifn_write_1(struct hifn_device *dev, u32 reg, u32 val)  in hifn_write_1()  function
716 	hifn_write_1(dev, HIFN_1_DMA_CSR,  in hifn_stop_device()
720 	hifn_write_1(dev, HIFN_1_DMA_IER, 0);  in hifn_stop_device()
730 	hifn_write_1(dev, HIFN_1_DMA_CNFG, HIFN_DMACNFG_MSTRESET |  in hifn_reset_dma()
738 		hifn_write_1(dev, HIFN_1_DMA_CNFG, HIFN_DMACNFG_MODE);  in hifn_reset_dma()
741 		hifn_write_1(dev, HIFN_1_DMA_CNFG, HIFN_DMACNFG_MODE |  in hifn_reset_dma()
746 	hifn_write_1(dev, HIFN_1_DMA_CNFG, HIFN_DMACNFG_MSTRESET |  in hifn_reset_dma()
846 	hifn_write_1(dev, HIFN_1_PUB_RESET, hifn_read_1(dev, HIFN_1_PUB_RESET) |  in hifn_init_pubrng()
860 		hifn_write_1(dev, HIFN_1_PUB_IEN, HIFN_PUBIEN_DONE);  in hifn_init_pubrng()
862 		hifn_write_1(dev, HIFN_1_DMA_IER, dev->dmareg);  in hifn_init_pubrng()
872 	hifn_write_1(dev, HIFN_1_RNG_CONFIG,  in hifn_init_pubrng()
906 	hifn_write_1(dev, HIFN_1_DMA_CNFG,  in hifn_enable_crypto()
912 	hifn_write_1(dev, HIFN_1_UNLOCK_SECRET2, 0);  in hifn_enable_crypto()
917 		hifn_write_1(dev, HIFN_1_UNLOCK_SECRET2, addr);  in hifn_enable_crypto()
921 	hifn_write_1(dev, HIFN_1_DMA_CNFG, dmacfg);  in hifn_enable_crypto()
1001 	hifn_write_1(dev, HIFN_1_PLL, pllcfg |  in hifn_init_pll()
1008 	hifn_write_1(dev, HIFN_1_PLL, pllcfg |  in hifn_init_pll()
1012 	hifn_write_1(dev, HIFN_1_PLL, pllcfg |  in hifn_init_pll()
1034 	hifn_write_1(dev, HIFN_1_DMA_CRAR, dptr +  in hifn_init_registers()
1036 	hifn_write_1(dev, HIFN_1_DMA_SRAR, dptr +  in hifn_init_registers()
1038 	hifn_write_1(dev, HIFN_1_DMA_DRAR, dptr +  in hifn_init_registers()
1040 	hifn_write_1(dev, HIFN_1_DMA_RRAR, dptr +  in hifn_init_registers()
1045 	hifn_write_1(dev, HIFN_1_DMA_CSR,  in hifn_init_registers()
1059 	hifn_write_1(dev, HIFN_1_DMA_CSR,  in hifn_init_registers()
1081 	hifn_write_1(dev, HIFN_1_DMA_IER, dev->dmareg);  in hifn_init_registers()
1094 	hifn_write_1(dev, HIFN_1_DMA_CNFG, HIFN_DMACNFG_MSTRESET |  in hifn_init_registers()
1146 		hifn_write_1(dev, HIFN_1_DMA_IER, dev->dmareg);  in hifn_setup_crypto_command()
1272 		hifn_write_1(dev, HIFN_1_DMA_CSR, HIFN_DMACSR_C_CTRL_ENA);  in hifn_setup_cmd_desc()
1307 		hifn_write_1(dev, HIFN_1_DMA_CSR, HIFN_DMACSR_S_CTRL_ENA);  in hifn_setup_src_desc()
1334 		hifn_write_1(dev, HIFN_1_DMA_CSR, HIFN_DMACSR_R_CTRL_ENA);  in hifn_setup_res_desc()
1363 		hifn_write_1(dev, HIFN_1_DMA_CSR, HIFN_DMACSR_D_CTRL_ENA);  in hifn_setup_dst_desc()
1910 			hifn_write_1(dev, HIFN_1_DMA_CSR, r);  in hifn_work()
1969 	hifn_write_1(dev, HIFN_1_DMA_CSR, dmacsr & dev->dmareg);  in hifn_interrupt()
1974 		hifn_write_1(dev, HIFN_1_PUB_STATUS,  in hifn_interrupt()
1987 		hifn_write_1(dev, HIFN_1_DMA_CSR, dmacsr & (HIFN_DMACSR_R_OVER |  in hifn_interrupt()
2007 		hifn_write_1(dev, HIFN_1_DMA_IER, dev->dmareg);  in hifn_interrupt()