34 	setbits32(&jrp->rregs->rconfig_lo, JRCFG_IMSK);  in caam_reset_hw_jr()
37 	wr_reg32(&jrp->rregs->jrcommand, JRCR_RESET);  in caam_reset_hw_jr()
38 	while (((rd_reg32(&jrp->rregs->jrintstatus) & JRINT_ERR_HALT_MASK) ==  in caam_reset_hw_jr()
42 	if ((rd_reg32(&jrp->rregs->jrintstatus) & JRINT_ERR_HALT_MASK) !=  in caam_reset_hw_jr()
50 	wr_reg32(&jrp->rregs->jrcommand, JRCR_RESET);  in caam_reset_hw_jr()
51 	while ((rd_reg32(&jrp->rregs->jrcommand) & JRCR_RESET) && --timeout)  in caam_reset_hw_jr()
60 	clrbits32(&jrp->rregs->rconfig_lo, JRCFG_IMSK);  in caam_reset_hw_jr()
82 	inpbusaddr = rd_reg64(&jrp->rregs->inpring_base);  in caam_jr_shutdown()
83 	outbusaddr = rd_reg64(&jrp->rregs->outring_base);  in caam_jr_shutdown()
135 	irqstate = rd_reg32(&jrp->rregs->jrintstatus);  in caam_jr_interrupt()
150 	setbits32(&jrp->rregs->rconfig_lo, JRCFG_IMSK);  in caam_jr_interrupt()
153 	wr_reg32(&jrp->rregs->jrintstatus, irqstate);  in caam_jr_interrupt()
172 	while (rd_reg32(&jrp->rregs->outring_used)) {  in caam_jr_dequeue()
213 		wr_reg32(&jrp->rregs->outring_rmvd, 1);  in caam_jr_dequeue()
239 	clrbits32(&jrp->rregs->rconfig_lo, JRCFG_IMSK);  in caam_jr_dequeue()
345 	if (!rd_reg32(&jrp->rregs->inpring_avail) ||  in caam_jr_enqueue()
378 	wr_reg32(&jrp->rregs->inpring_jobadd, 1);  in caam_jr_enqueue()
436 	wr_reg64(&jrp->rregs->inpring_base, inpbusaddr);  in caam_jr_init()
437 	wr_reg64(&jrp->rregs->outring_base, outbusaddr);  in caam_jr_init()
438 	wr_reg32(&jrp->rregs->inpring_size, JOBR_DEPTH);  in caam_jr_init()
439 	wr_reg32(&jrp->rregs->outring_size, JOBR_DEPTH);  in caam_jr_init()
447 	setbits32(&jrp->rregs->rconfig_lo, JOBR_INTC |  in caam_jr_init()
499 	jrpriv->rregs = (struct caam_job_ring __force *)ctrl;  in caam_jr_probe()