Lines Matching refs:index
224 static int s5pv210_target(struct cpufreq_policy *policy, unsigned int index) in s5pv210_target() argument
244 new_freq = s5pv210_freq_table[index].frequency; in s5pv210_target()
254 arm_volt = dvs_conf[index].arm_volt; in s5pv210_target()
255 int_volt = dvs_conf[index].int_volt; in s5pv210_target()
270 if ((index == L0) || (priv_index == L0)) in s5pv210_target()
274 if ((index == L4) || (priv_index == L4)) in s5pv210_target()
355 reg |= ((clkdiv_val[index][0] << S5P_CLKDIV0_APLL_SHIFT) | in s5pv210_target()
356 (clkdiv_val[index][1] << S5P_CLKDIV0_A2M_SHIFT) | in s5pv210_target()
357 (clkdiv_val[index][2] << S5P_CLKDIV0_HCLK200_SHIFT) | in s5pv210_target()
358 (clkdiv_val[index][3] << S5P_CLKDIV0_PCLK100_SHIFT) | in s5pv210_target()
359 (clkdiv_val[index][4] << S5P_CLKDIV0_HCLK166_SHIFT) | in s5pv210_target()
360 (clkdiv_val[index][5] << S5P_CLKDIV0_PCLK83_SHIFT) | in s5pv210_target()
361 (clkdiv_val[index][6] << S5P_CLKDIV0_HCLK133_SHIFT) | in s5pv210_target()
362 (clkdiv_val[index][7] << S5P_CLKDIV0_PCLK66_SHIFT)); in s5pv210_target()
373 if (index >= L3) in s5pv210_target()
389 if (index == L0) in s5pv210_target()
419 reg |= (clkdiv_val[index][10] << S5P_CLKDIV2_G3D_SHIFT) | in s5pv210_target()
420 (clkdiv_val[index][9] << S5P_CLKDIV2_MFC_SHIFT); in s5pv210_target()
454 reg |= (clkdiv_val[index][8] << S5P_CLKDIV6_ONEDRAM_SHIFT); in s5pv210_target()
462 if (index != L4) { in s5pv210_target()
487 printk(KERN_DEBUG "Perf changed[L%d]\n", index); in s5pv210_target()