Lines Matching refs:lo
92 u32 lo, hi; in pending_bit_stuck() local
94 rdmsr(MSR_FIDVID_STATUS, lo, hi); in pending_bit_stuck()
95 return lo & MSR_S_LO_CHANGE_PENDING ? 1 : 0; in pending_bit_stuck()
104 u32 lo, hi; in query_current_values_with_pending_wait() local
112 rdmsr(MSR_FIDVID_STATUS, lo, hi); in query_current_values_with_pending_wait()
113 } while (lo & MSR_S_LO_CHANGE_PENDING); in query_current_values_with_pending_wait()
116 data->currfid = lo & MSR_S_LO_CURRENT_FID; in query_current_values_with_pending_wait()
138 u32 lo, hi; in fidvid_msr_init() local
141 rdmsr(MSR_FIDVID_STATUS, lo, hi); in fidvid_msr_init()
143 fid = lo & MSR_S_LO_CURRENT_FID; in fidvid_msr_init()
144 lo = fid | (vid << MSR_C_LO_VID_SHIFT); in fidvid_msr_init()
146 pr_debug("cpu%d, init lo 0x%x, hi 0x%x\n", smp_processor_id(), lo, hi); in fidvid_msr_init()
147 wrmsr(MSR_FIDVID_CTL, lo, hi); in fidvid_msr_init()
153 u32 lo; in write_new_fid() local
162 lo = fid; in write_new_fid()
163 lo |= (data->currvid << MSR_C_LO_VID_SHIFT); in write_new_fid()
164 lo |= MSR_C_LO_INIT_FID_VID; in write_new_fid()
167 fid, lo, data->plllock * PLL_LOCK_CONVERSION); in write_new_fid()
170 wrmsr(MSR_FIDVID_CTL, lo, data->plllock * PLL_LOCK_CONVERSION); in write_new_fid()
197 u32 lo; in write_new_vid() local
206 lo = data->currfid; in write_new_vid()
207 lo |= (vid << MSR_C_LO_VID_SHIFT); in write_new_vid()
208 lo |= MSR_C_LO_INIT_FID_VID; in write_new_vid()
211 vid, lo, STOP_GRANT_5NS); in write_new_vid()
214 wrmsr(MSR_FIDVID_CTL, lo, STOP_GRANT_5NS); in write_new_vid()
290 u32 maxvid, lo, rvomult = 1; in core_voltage_pre_transition() local
299 rdmsr(MSR_FIDVID_STATUS, lo, maxvid); in core_voltage_pre_transition()