Lines Matching refs:tctl_val
329 u32 tctl_val; in imx1_gpt_setup_tctl() local
331 tctl_val = MX1_2_TCTL_FRR | MX1_2_TCTL_CLK_PCLK1 | MXC_TCTL_TEN; in imx1_gpt_setup_tctl()
332 writel_relaxed(tctl_val, imxtm->base + MXC_TCTL); in imx1_gpt_setup_tctl()
338 u32 tctl_val; in imx31_gpt_setup_tctl() local
340 tctl_val = V2_TCTL_FRR | V2_TCTL_WAITEN | MXC_TCTL_TEN; in imx31_gpt_setup_tctl()
342 tctl_val |= V2_TCTL_CLK_OSC_DIV8; in imx31_gpt_setup_tctl()
344 tctl_val |= V2_TCTL_CLK_PER; in imx31_gpt_setup_tctl()
346 writel_relaxed(tctl_val, imxtm->base + MXC_TCTL); in imx31_gpt_setup_tctl()
351 u32 tctl_val; in imx6dl_gpt_setup_tctl() local
353 tctl_val = V2_TCTL_FRR | V2_TCTL_WAITEN | MXC_TCTL_TEN; in imx6dl_gpt_setup_tctl()
355 tctl_val |= V2_TCTL_CLK_OSC_DIV8; in imx6dl_gpt_setup_tctl()
358 tctl_val |= V2_TCTL_24MEN; in imx6dl_gpt_setup_tctl()
360 tctl_val |= V2_TCTL_CLK_PER; in imx6dl_gpt_setup_tctl()
363 writel_relaxed(tctl_val, imxtm->base + MXC_TCTL); in imx6dl_gpt_setup_tctl()