66 static void __iomem *mtu_base;  variable
80 	if (unlikely(!mtu_base))  in nomadik_read_sched_clock()
83 	return -readl(mtu_base + MTU_VAL(0));  in nomadik_read_sched_clock()
89 	return ~readl_relaxed(mtu_base + MTU_VAL(0));  in nmdk_timer_read_current_timer()
95 	writel(1 << 1, mtu_base + MTU_IMSC);  in nmdk_clkevt_next()
96 	writel(evt, mtu_base + MTU_LR(1));  in nmdk_clkevt_next()
100 	       mtu_base + MTU_CR(1));  in nmdk_clkevt_next()
109 		writel(nmdk_cycle, mtu_base + MTU_LR(1));  in nmdk_clkevt_reset()
110 		writel(nmdk_cycle, mtu_base + MTU_BGLR(1));  in nmdk_clkevt_reset()
114 		       mtu_base + MTU_CR(1));  in nmdk_clkevt_reset()
115 		writel(1 << 1, mtu_base + MTU_IMSC);  in nmdk_clkevt_reset()
124 	writel(0, mtu_base + MTU_IMSC);  in nmdk_clkevt_shutdown()
126 	writel(0, mtu_base + MTU_CR(1));  in nmdk_clkevt_shutdown()
128 	writel(0xffffffff, mtu_base + MTU_LR(1));  in nmdk_clkevt_shutdown()
148 	writel(0, mtu_base + MTU_CR(0));  in nmdk_clksrc_reset()
151 	writel(nmdk_cycle, mtu_base + MTU_LR(0));  in nmdk_clksrc_reset()
152 	writel(nmdk_cycle, mtu_base + MTU_BGLR(0));  in nmdk_clksrc_reset()
155 	       mtu_base + MTU_CR(0));  in nmdk_clksrc_reset()
184 	writel(1 << 1, mtu_base + MTU_ICR); /* Interrupt clear reg */  in nmdk_timer_interrupt()
201 	mtu_base = base;  in nmdk_timer_init()
229 	if (clocksource_mmio_init(mtu_base + MTU_VAL(0), "mtu_0",  in nmdk_timer_init()