242 				ARRAY_SIZE(pll_a9_config), &reg_lock);  in zx296702_top_clocks_init()
288 				ARRAY_SIZE(matrix_aclk_sel), CLK_MUX, 2, 2);  in zx296702_top_clocks_init()
312 		zx_mux("a9_wclk", a9_wclk_sel, ARRAY_SIZE(a9_wclk_sel), CLK_MUX,  in zx296702_top_clocks_init()
316 				ARRAY_SIZE(a9_as1_aclk_sel), CLK_MUX, 4, 2);  in zx296702_top_clocks_init()
319 				ARRAY_SIZE(a9_trace_clkin_sel), CLK_MUX1, 0, 2);  in zx296702_top_clocks_init()
333 				ARRAY_SIZE(decppu_aclk_sel), CLK_MUX, 6, 2);  in zx296702_top_clocks_init()
336 				ARRAY_SIZE(decppu_aclk_sel), CLK_MUX, 8, 2);  in zx296702_top_clocks_init()
339 				ARRAY_SIZE(decppu_aclk_sel), CLK_MUX, 12, 2);  in zx296702_top_clocks_init()
342 				ARRAY_SIZE(decppu_aclk_sel), CLK_MUX, 10, 2);  in zx296702_top_clocks_init()
345 				ARRAY_SIZE(vou_main_wclk_sel), CLK_MUX, 14, 2);  in zx296702_top_clocks_init()
348 				ARRAY_SIZE(vou_main_wclk_sel), CLK_MUX, 16, 2);  in zx296702_top_clocks_init()
351 				ARRAY_SIZE(vou_scaler_wclk_sel), CLK_MUX,  in zx296702_top_clocks_init()
355 				ARRAY_SIZE(decppu_aclk_sel), CLK_MUX, 20, 2);  in zx296702_top_clocks_init()
358 				ARRAY_SIZE(r2d_wclk_sel), CLK_MUX, 22, 2);  in zx296702_top_clocks_init()
381 				ARRAY_SIZE(ddr_wclk_sel), CLK_MUX, 24, 2);  in zx296702_top_clocks_init()
384 				ARRAY_SIZE(nand_wclk_sel), CLK_MUX, 24, 2);  in zx296702_top_clocks_init()
387 				ARRAY_SIZE(lsp_26_wclk_sel), CLK_MUX, 27, 1);  in zx296702_top_clocks_init()
517 		zx_mux("vl0_mux", vl0_sel, ARRAY_SIZE(vl0_sel),  in zx296702_top_clocks_init()
520 		zx_mux("vl1_mux", vl0_sel, ARRAY_SIZE(vl0_sel),  in zx296702_top_clocks_init()
523 		zx_mux("vl2_mux", vl0_sel, ARRAY_SIZE(vl0_sel),  in zx296702_top_clocks_init()
526 		zx_mux("gl0_mux", vl0_sel, ARRAY_SIZE(vl0_sel),  in zx296702_top_clocks_init()
529 		zx_mux("gl1_mux", vl0_sel, ARRAY_SIZE(vl0_sel),  in zx296702_top_clocks_init()
532 		zx_mux("gl2_mux", vl0_sel, ARRAY_SIZE(vl0_sel),  in zx296702_top_clocks_init()
535 		zx_mux("wb_mux",  vl0_sel, ARRAY_SIZE(vl0_sel),  in zx296702_top_clocks_init()
538 		zx_mux("hdmi_mux", hdmi_sel, ARRAY_SIZE(hdmi_sel),  in zx296702_top_clocks_init()
541 		zx_mux("vou_tv_enc_hd_mux", hdmi_sel, ARRAY_SIZE(hdmi_sel),  in zx296702_top_clocks_init()
544 		zx_mux("vou_tv_enc_sd_mux", hdmi_sel, ARRAY_SIZE(hdmi_sel),  in zx296702_top_clocks_init()
582 	for (i = 0; i < ARRAY_SIZE(topclk); i++) {  in zx296702_top_clocks_init()
591 	topclk_data.clk_num = ARRAY_SIZE(topclk);  in zx296702_top_clocks_init()
608 				ARRAY_SIZE(sdmmc1_wclk_sel), CLK_SDMMC1, 4, 1);  in zx296702_lsp0_clocks_init()
622 				ARRAY_SIZE(spdif0_wclk_sel), CLK_SPDIF0, 4, 1);  in zx296702_lsp0_clocks_init()
635 				ARRAY_SIZE(i2s_wclk_sel), CLK_I2S0, 4, 1);  in zx296702_lsp0_clocks_init()
646 				ARRAY_SIZE(i2s_wclk_sel), CLK_I2S1, 4, 1);  in zx296702_lsp0_clocks_init()
657 				ARRAY_SIZE(i2s_wclk_sel), CLK_I2S2, 4, 1);  in zx296702_lsp0_clocks_init()
666 	for (i = 0; i < ARRAY_SIZE(lsp0clk); i++) {  in zx296702_lsp0_clocks_init()
675 	lsp0clk_data.clk_num = ARRAY_SIZE(lsp0clk);  in zx296702_lsp0_clocks_init()
692 				ARRAY_SIZE(uart_wclk_sel), CLK_UART0, 4, 1);  in zx296702_lsp1_clocks_init()
703 				ARRAY_SIZE(uart_wclk_sel), CLK_UART1, 4, 1);  in zx296702_lsp1_clocks_init()
712 				ARRAY_SIZE(sdmmc0_wclk_sel), CLK_SDMMC0, 4, 1);  in zx296702_lsp1_clocks_init()
722 				ARRAY_SIZE(spdif1_wclk_sel), CLK_SPDIF1, 4, 1);  in zx296702_lsp1_clocks_init()
732 	for (i = 0; i < ARRAY_SIZE(lsp1clk); i++) {  in zx296702_lsp1_clocks_init()
741 	lsp1clk_data.clk_num = ARRAY_SIZE(lsp1clk);  in zx296702_lsp1_clocks_init()