Lines Matching refs:CLKRST3_INDEX
27 CLKRST3_INDEX, enumerator
367 clk = clk_reg_prcc_pclk("p3_pclk0", "per3clk", bases[CLKRST3_INDEX], in u8540_clk_init()
371 clk = clk_reg_prcc_pclk("p3_pclk1", "per3clk", bases[CLKRST3_INDEX], in u8540_clk_init()
375 clk = clk_reg_prcc_pclk("p3_pclk2", "per3clk", bases[CLKRST3_INDEX], in u8540_clk_init()
379 clk = clk_reg_prcc_pclk("p3_pclk3", "per3clk", bases[CLKRST3_INDEX], in u8540_clk_init()
383 clk = clk_reg_prcc_pclk("p3_pclk4", "per3clk", bases[CLKRST3_INDEX], in u8540_clk_init()
387 clk = clk_reg_prcc_pclk("p3_pclk5", "per3clk", bases[CLKRST3_INDEX], in u8540_clk_init()
392 clk = clk_reg_prcc_pclk("p3_pclk6", "per3clk", bases[CLKRST3_INDEX], in u8540_clk_init()
396 clk = clk_reg_prcc_pclk("p3_pclk7", "per3clk", bases[CLKRST3_INDEX], in u8540_clk_init()
400 clk = clk_reg_prcc_pclk("p3_pclk8", "per3clk", bases[CLKRST3_INDEX], in u8540_clk_init()
408 clk = clk_reg_prcc_pclk("p3_pclk9", "per3clk", bases[CLKRST3_INDEX], in u8540_clk_init()
412 clk = clk_reg_prcc_pclk("p3_pclk10", "per3clk", bases[CLKRST3_INDEX], in u8540_clk_init()
416 clk = clk_reg_prcc_pclk("p3_pclk11", "per3clk", bases[CLKRST3_INDEX], in u8540_clk_init()
420 clk = clk_reg_prcc_pclk("p3_pclk12", "per3clk", bases[CLKRST3_INDEX], in u8540_clk_init()
565 bases[CLKRST3_INDEX], BIT(1), CLK_SET_RATE_GATE); in u8540_clk_init()
569 bases[CLKRST3_INDEX], BIT(2), CLK_SET_RATE_GATE); in u8540_clk_init()
573 bases[CLKRST3_INDEX], BIT(3), CLK_SET_RATE_GATE); in u8540_clk_init()
577 bases[CLKRST3_INDEX], BIT(4), CLK_SET_RATE_GATE); in u8540_clk_init()
581 bases[CLKRST3_INDEX], BIT(5), CLK_SET_RATE_GATE); in u8540_clk_init()
586 bases[CLKRST3_INDEX], BIT(6), CLK_SET_RATE_GATE); in u8540_clk_init()
590 bases[CLKRST3_INDEX], BIT(7), CLK_SET_RATE_GATE); in u8540_clk_init()
594 bases[CLKRST3_INDEX], BIT(8), CLK_SET_RATE_GATE); in u8540_clk_init()
598 bases[CLKRST3_INDEX], BIT(9), CLK_SET_RATE_GATE); in u8540_clk_init()
602 bases[CLKRST3_INDEX], BIT(10), CLK_SET_RATE_GATE); in u8540_clk_init()
606 bases[CLKRST3_INDEX], BIT(11), CLK_SET_RATE_GATE); in u8540_clk_init()