29 	u8 reg_bits[SYSCTRL_MAX_NUM_PARENTS];  member
42 				clk->reg_bits[0]);  in clk_sysctrl_prepare()
81 					clk->reg_bits[index]);  in clk_sysctrl_set_parent()
86 						clk->reg_bits[old_index]);  in clk_sysctrl_set_parent()
123 				u8 *reg_bits,  in clk_reg_sysctrl()  argument
150 	clk->reg_bits[0] = reg_bits[0];  in clk_reg_sysctrl()
156 		clk->reg_bits[i] = reg_bits[i];  in clk_reg_sysctrl()
184 				u8 reg_bits,  in clk_reg_sysctrl_gate()  argument
192 			&reg_sel, &reg_mask, &reg_bits, 0, enable_delay_us,  in clk_reg_sysctrl_gate()
201 					u8 reg_bits,  in clk_reg_sysctrl_gate_fixed_rate()  argument
210 			&reg_sel, &reg_mask, &reg_bits,  in clk_reg_sysctrl_gate_fixed_rate()
221 				u8 *reg_bits,  in clk_reg_sysctrl_set_parent()  argument
225 			reg_sel, reg_mask, reg_bits, 0, 0, flags,  in clk_reg_sysctrl_set_parent()