33 	struct clk_mux *mux = to_clk_mux(hw);  in ti_clk_mux_get_parent()  local
44 	val = ti_clk_ll_ops->clk_readl(mux->reg) >> mux->shift;  in ti_clk_mux_get_parent()
45 	val &= mux->mask;  in ti_clk_mux_get_parent()
47 	if (mux->table) {  in ti_clk_mux_get_parent()
51 			if (mux->table[i] == val)  in ti_clk_mux_get_parent()
56 	if (val && (mux->flags & CLK_MUX_INDEX_BIT))  in ti_clk_mux_get_parent()
59 	if (val && (mux->flags & CLK_MUX_INDEX_ONE))  in ti_clk_mux_get_parent()
70 	struct clk_mux *mux = to_clk_mux(hw);  in ti_clk_mux_set_parent()  local
73 	if (mux->table) {  in ti_clk_mux_set_parent()
74 		index = mux->table[index];  in ti_clk_mux_set_parent()
76 		if (mux->flags & CLK_MUX_INDEX_BIT)  in ti_clk_mux_set_parent()
79 		if (mux->flags & CLK_MUX_INDEX_ONE)  in ti_clk_mux_set_parent()
83 	if (mux->flags & CLK_MUX_HIWORD_MASK) {  in ti_clk_mux_set_parent()
84 		val = mux->mask << (mux->shift + 16);  in ti_clk_mux_set_parent()
86 		val = ti_clk_ll_ops->clk_readl(mux->reg);  in ti_clk_mux_set_parent()
87 		val &= ~(mux->mask << mux->shift);  in ti_clk_mux_set_parent()
89 	val |= index << mux->shift;  in ti_clk_mux_set_parent()
90 	ti_clk_ll_ops->clk_writel(val, mux->reg);  in ti_clk_mux_set_parent()
107 	struct clk_mux *mux;  in _register_mux()  local
112 	mux = kzalloc(sizeof(*mux), GFP_KERNEL);  in _register_mux()
113 	if (!mux) {  in _register_mux()
125 	mux->reg = reg;  in _register_mux()
126 	mux->shift = shift;  in _register_mux()
127 	mux->mask = mask;  in _register_mux()
128 	mux->flags = clk_mux_flags;  in _register_mux()
129 	mux->table = table;  in _register_mux()
130 	mux->hw.init = &init;  in _register_mux()
132 	clk = clk_register(dev, &mux->hw);  in _register_mux()
135 		kfree(mux);  in _register_mux()
142 	struct ti_clk_mux *mux;  in ti_clk_register_mux()  local
151 	mux = setup->data;  in ti_clk_register_mux()
154 	mask = mux->num_parents;  in ti_clk_register_mux()
155 	if (!(mux->flags & CLKF_INDEX_STARTS_AT_ONE))  in ti_clk_register_mux()
159 	reg_setup->index = mux->module;  in ti_clk_register_mux()
160 	reg_setup->offset = mux->reg;  in ti_clk_register_mux()
162 	if (mux->flags & CLKF_INDEX_STARTS_AT_ONE)  in ti_clk_register_mux()
165 	if (mux->flags & CLKF_SET_RATE_PARENT)  in ti_clk_register_mux()
168 	return _register_mux(NULL, setup->name, mux->parents, mux->num_parents,  in ti_clk_register_mux()
169 			     flags, (void __iomem *)reg, mux->bit_shift, mask,  in ti_clk_register_mux()
234 	struct clk_mux *mux;  in ti_clk_build_component_mux()  local
241 	mux = kzalloc(sizeof(*mux), GFP_KERNEL);  in ti_clk_build_component_mux()
242 	if (!mux)  in ti_clk_build_component_mux()
245 	reg = (struct clk_omap_reg *)&mux->reg;  in ti_clk_build_component_mux()
247 	mux->shift = setup->bit_shift;  in ti_clk_build_component_mux()
253 		mux->flags |= CLK_MUX_INDEX_ONE;  in ti_clk_build_component_mux()
257 	mux->mask = num_parents - 1;  in ti_clk_build_component_mux()
258 	mux->mask = (1 << fls(mux->mask)) - 1;  in ti_clk_build_component_mux()
260 	return &mux->hw;  in ti_clk_build_component_mux()
265 	struct clk_mux *mux;  in of_ti_composite_mux_clk_setup()  local
269 	mux = kzalloc(sizeof(*mux), GFP_KERNEL);  in of_ti_composite_mux_clk_setup()
270 	if (!mux)  in of_ti_composite_mux_clk_setup()
273 	mux->reg = ti_clk_get_reg_addr(node, 0);  in of_ti_composite_mux_clk_setup()
275 	if (IS_ERR(mux->reg))  in of_ti_composite_mux_clk_setup()
279 		mux->shift = val;  in of_ti_composite_mux_clk_setup()
282 		mux->flags |= CLK_MUX_INDEX_ONE;  in of_ti_composite_mux_clk_setup()
291 	mux->mask = num_parents - 1;  in of_ti_composite_mux_clk_setup()
292 	mux->mask = (1 << fls(mux->mask)) - 1;  in of_ti_composite_mux_clk_setup()
294 	if (!ti_clk_add_component(node, &mux->hw, CLK_COMPONENT_TYPE_MUX))  in of_ti_composite_mux_clk_setup()
298 	kfree(mux);  in of_ti_composite_mux_clk_setup()