52 	const struct dpll_data *dd;  in _omap3_dpll_write_clken()  local
55 	dd = clk->dpll_data;  in _omap3_dpll_write_clken()
57 	v = ti_clk_ll_ops->clk_readl(dd->control_reg);  in _omap3_dpll_write_clken()
58 	v &= ~dd->enable_mask;  in _omap3_dpll_write_clken()
59 	v |= clken_bits << __ffs(dd->enable_mask);  in _omap3_dpll_write_clken()
60 	ti_clk_ll_ops->clk_writel(v, dd->control_reg);  in _omap3_dpll_write_clken()
66 	const struct dpll_data *dd;  in _omap3_wait_dpll_status()  local
71 	dd = clk->dpll_data;  in _omap3_wait_dpll_status()
74 	state <<= __ffs(dd->idlest_mask);  in _omap3_wait_dpll_status()
76 	while (((ti_clk_ll_ops->clk_readl(dd->idlest_reg) & dd->idlest_mask)  in _omap3_wait_dpll_status()
143 	const struct dpll_data *dd;  in _omap3_noncore_dpll_lock()  local
150 	dd = clk->dpll_data;  in _omap3_noncore_dpll_lock()
151 	state <<= __ffs(dd->idlest_mask);  in _omap3_noncore_dpll_lock()
154 	if ((ti_clk_ll_ops->clk_readl(dd->idlest_reg) & dd->idlest_mask) ==  in _omap3_noncore_dpll_lock()
307 	struct dpll_data *dd = clk->dpll_data;  in omap3_noncore_dpll_program()  local
319 		v = ti_clk_ll_ops->clk_readl(dd->control_reg);  in omap3_noncore_dpll_program()
320 		v &= ~dd->freqsel_mask;  in omap3_noncore_dpll_program()
321 		v |= freqsel << __ffs(dd->freqsel_mask);  in omap3_noncore_dpll_program()
322 		ti_clk_ll_ops->clk_writel(v, dd->control_reg);  in omap3_noncore_dpll_program()
326 	v = ti_clk_ll_ops->clk_readl(dd->mult_div1_reg);  in omap3_noncore_dpll_program()
329 	if (dd->dcc_mask) {  in omap3_noncore_dpll_program()
330 		if (dd->last_rounded_rate >= dd->dcc_rate)  in omap3_noncore_dpll_program()
331 			v |= dd->dcc_mask; /* Enable DCC */  in omap3_noncore_dpll_program()
333 			v &= ~dd->dcc_mask; /* Disable DCC */  in omap3_noncore_dpll_program()
336 	v &= ~(dd->mult_mask | dd->div1_mask);  in omap3_noncore_dpll_program()
337 	v |= dd->last_rounded_m << __ffs(dd->mult_mask);  in omap3_noncore_dpll_program()
338 	v |= (dd->last_rounded_n - 1) << __ffs(dd->div1_mask);  in omap3_noncore_dpll_program()
341 	if (dd->dco_mask) {  in omap3_noncore_dpll_program()
342 		_lookup_dco(clk, &dco, dd->last_rounded_m, dd->last_rounded_n);  in omap3_noncore_dpll_program()
343 		v &= ~(dd->dco_mask);  in omap3_noncore_dpll_program()
344 		v |= dco << __ffs(dd->dco_mask);  in omap3_noncore_dpll_program()
346 	if (dd->sddiv_mask) {  in omap3_noncore_dpll_program()
347 		_lookup_sddiv(clk, &sd_div, dd->last_rounded_m,  in omap3_noncore_dpll_program()
348 			      dd->last_rounded_n);  in omap3_noncore_dpll_program()
349 		v &= ~(dd->sddiv_mask);  in omap3_noncore_dpll_program()
350 		v |= sd_div << __ffs(dd->sddiv_mask);  in omap3_noncore_dpll_program()
353 	ti_clk_ll_ops->clk_writel(v, dd->mult_div1_reg);  in omap3_noncore_dpll_program()
356 	if (dd->m4xen_mask || dd->lpmode_mask) {  in omap3_noncore_dpll_program()
357 		v = ti_clk_ll_ops->clk_readl(dd->control_reg);  in omap3_noncore_dpll_program()
359 		if (dd->m4xen_mask) {  in omap3_noncore_dpll_program()
360 			if (dd->last_rounded_m4xen)  in omap3_noncore_dpll_program()
361 				v |= dd->m4xen_mask;  in omap3_noncore_dpll_program()
363 				v &= ~dd->m4xen_mask;  in omap3_noncore_dpll_program()
366 		if (dd->lpmode_mask) {  in omap3_noncore_dpll_program()
367 			if (dd->last_rounded_lpmode)  in omap3_noncore_dpll_program()
368 				v |= dd->lpmode_mask;  in omap3_noncore_dpll_program()
370 				v &= ~dd->lpmode_mask;  in omap3_noncore_dpll_program()
373 		ti_clk_ll_ops->clk_writel(v, dd->control_reg);  in omap3_noncore_dpll_program()
420 	struct dpll_data *dd;  in omap3_noncore_dpll_enable()  local
423 	dd = clk->dpll_data;  in omap3_noncore_dpll_enable()
424 	if (!dd)  in omap3_noncore_dpll_enable()
440 	if (clk_hw_get_rate(hw) == clk_get_rate(dd->clk_bypass)) {  in omap3_noncore_dpll_enable()
441 		WARN_ON(parent != __clk_get_hw(dd->clk_bypass));  in omap3_noncore_dpll_enable()
444 		WARN_ON(parent != __clk_get_hw(dd->clk_ref));  in omap3_noncore_dpll_enable()
483 	struct dpll_data *dd;  in omap3_noncore_dpll_determine_rate()  local
488 	dd = clk->dpll_data;  in omap3_noncore_dpll_determine_rate()
489 	if (!dd)  in omap3_noncore_dpll_determine_rate()
492 	if (clk_get_rate(dd->clk_bypass) == req->rate &&  in omap3_noncore_dpll_determine_rate()
493 	    (dd->modes & (1 << DPLL_LOW_POWER_BYPASS))) {  in omap3_noncore_dpll_determine_rate()
494 		req->best_parent_hw = __clk_get_hw(dd->clk_bypass);  in omap3_noncore_dpll_determine_rate()
498 		req->best_parent_hw = __clk_get_hw(dd->clk_ref);  in omap3_noncore_dpll_determine_rate()
545 	struct dpll_data *dd;  in omap3_noncore_dpll_set_rate()  local
552 	dd = clk->dpll_data;  in omap3_noncore_dpll_set_rate()
553 	if (!dd)  in omap3_noncore_dpll_set_rate()
556 	if (clk_hw_get_parent(hw) != __clk_get_hw(dd->clk_ref))  in omap3_noncore_dpll_set_rate()
559 	if (dd->last_rounded_rate == 0)  in omap3_noncore_dpll_set_rate()
564 		freqsel = _omap3_dpll_compute_freqsel(clk, dd->last_rounded_n);  in omap3_noncore_dpll_set_rate()
624 	const struct dpll_data *dd;  in omap3_dpll_autoidle_read()  local
630 	dd = clk->dpll_data;  in omap3_dpll_autoidle_read()
632 	if (!dd->autoidle_reg)  in omap3_dpll_autoidle_read()
635 	v = ti_clk_ll_ops->clk_readl(dd->autoidle_reg);  in omap3_dpll_autoidle_read()
636 	v &= dd->autoidle_mask;  in omap3_dpll_autoidle_read()
637 	v >>= __ffs(dd->autoidle_mask);  in omap3_dpll_autoidle_read()
653 	const struct dpll_data *dd;  in omap3_dpll_allow_idle()  local
659 	dd = clk->dpll_data;  in omap3_dpll_allow_idle()
661 	if (!dd->autoidle_reg)  in omap3_dpll_allow_idle()
669 	v = ti_clk_ll_ops->clk_readl(dd->autoidle_reg);  in omap3_dpll_allow_idle()
670 	v &= ~dd->autoidle_mask;  in omap3_dpll_allow_idle()
671 	v |= DPLL_AUTOIDLE_LOW_POWER_STOP << __ffs(dd->autoidle_mask);  in omap3_dpll_allow_idle()
672 	ti_clk_ll_ops->clk_writel(v, dd->autoidle_reg);  in omap3_dpll_allow_idle()
683 	const struct dpll_data *dd;  in omap3_dpll_deny_idle()  local
689 	dd = clk->dpll_data;  in omap3_dpll_deny_idle()
691 	if (!dd->autoidle_reg)  in omap3_dpll_deny_idle()
694 	v = ti_clk_ll_ops->clk_readl(dd->autoidle_reg);  in omap3_dpll_deny_idle()
695 	v &= ~dd->autoidle_mask;  in omap3_dpll_deny_idle()
696 	v |= DPLL_AUTOIDLE_DISABLE << __ffs(dd->autoidle_mask);  in omap3_dpll_deny_idle()
697 	ti_clk_ll_ops->clk_writel(v, dd->autoidle_reg);  in omap3_dpll_deny_idle()
736 	const struct dpll_data *dd;  in omap3_clkoutx2_recalc()  local
749 	dd = pclk->dpll_data;  in omap3_clkoutx2_recalc()
751 	WARN_ON(!dd->enable_mask);  in omap3_clkoutx2_recalc()
753 	v = ti_clk_ll_ops->clk_readl(dd->control_reg) & dd->enable_mask;  in omap3_clkoutx2_recalc()
754 	v >>= __ffs(dd->enable_mask);  in omap3_clkoutx2_recalc()
755 	if ((v != OMAP3XXX_EN_DPLL_LOCKED) || (dd->flags & DPLL_J_TYPE))  in omap3_clkoutx2_recalc()