200 	struct ti_clk_dpll *dpll;  in ti_clk_register_dpll()  local
205 	dpll = setup->data;  in ti_clk_register_dpll()
207 	if (dpll->num_parents < 2)  in ti_clk_register_dpll()
210 	clk_ref = clk_get_sys(NULL, dpll->parents[0]);  in ti_clk_register_dpll()
211 	clk_bypass = clk_get_sys(NULL, dpll->parents[1]);  in ti_clk_register_dpll()
231 	init.num_parents = dpll->num_parents;  in ti_clk_register_dpll()
232 	init.parent_names = dpll->parents;  in ti_clk_register_dpll()
234 	dd->control_reg = _get_reg(dpll->module, dpll->control_reg);  in ti_clk_register_dpll()
235 	dd->idlest_reg = _get_reg(dpll->module, dpll->idlest_reg);  in ti_clk_register_dpll()
236 	dd->mult_div1_reg = _get_reg(dpll->module, dpll->mult_div1_reg);  in ti_clk_register_dpll()
237 	dd->autoidle_reg = _get_reg(dpll->module, dpll->autoidle_reg);  in ti_clk_register_dpll()
239 	dd->modes = dpll->modes;  in ti_clk_register_dpll()
240 	dd->div1_mask = dpll->div1_mask;  in ti_clk_register_dpll()
241 	dd->idlest_mask = dpll->idlest_mask;  in ti_clk_register_dpll()
242 	dd->mult_mask = dpll->mult_mask;  in ti_clk_register_dpll()
243 	dd->autoidle_mask = dpll->autoidle_mask;  in ti_clk_register_dpll()
244 	dd->enable_mask = dpll->enable_mask;  in ti_clk_register_dpll()
245 	dd->sddiv_mask = dpll->sddiv_mask;  in ti_clk_register_dpll()
246 	dd->dco_mask = dpll->dco_mask;  in ti_clk_register_dpll()
247 	dd->max_divider = dpll->max_divider;  in ti_clk_register_dpll()
248 	dd->min_divider = dpll->min_divider;  in ti_clk_register_dpll()
249 	dd->max_multiplier = dpll->max_multiplier;  in ti_clk_register_dpll()
250 	dd->auto_recal_bit = dpll->auto_recal_bit;  in ti_clk_register_dpll()
251 	dd->recal_en_bit = dpll->recal_en_bit;  in ti_clk_register_dpll()
252 	dd->recal_st_bit = dpll->recal_st_bit;  in ti_clk_register_dpll()
257 	if (dpll->flags & CLKF_CORE)  in ti_clk_register_dpll()
260 	if (dpll->flags & CLKF_PER)  in ti_clk_register_dpll()
263 	if (dpll->flags & CLKF_J_TYPE)  in ti_clk_register_dpll()