44 	struct dpll_data *ad;  in dra7_apll_enable()  local
49 	ad = clk->dpll_data;  in dra7_apll_enable()
50 	if (!ad)  in dra7_apll_enable()
55 	state <<= __ffs(ad->idlest_mask);  in dra7_apll_enable()
58 	v = ti_clk_ll_ops->clk_readl(ad->idlest_reg);  in dra7_apll_enable()
60 	if ((v & ad->idlest_mask) == state)  in dra7_apll_enable()
63 	v = ti_clk_ll_ops->clk_readl(ad->control_reg);  in dra7_apll_enable()
64 	v &= ~ad->enable_mask;  in dra7_apll_enable()
65 	v |= APLL_FORCE_LOCK << __ffs(ad->enable_mask);  in dra7_apll_enable()
66 	ti_clk_ll_ops->clk_writel(v, ad->control_reg);  in dra7_apll_enable()
68 	state <<= __ffs(ad->idlest_mask);  in dra7_apll_enable()
71 		v = ti_clk_ll_ops->clk_readl(ad->idlest_reg);  in dra7_apll_enable()
72 		if ((v & ad->idlest_mask) == state)  in dra7_apll_enable()
94 	struct dpll_data *ad;  in dra7_apll_disable()  local
98 	ad = clk->dpll_data;  in dra7_apll_disable()
100 	state <<= __ffs(ad->idlest_mask);  in dra7_apll_disable()
102 	v = ti_clk_ll_ops->clk_readl(ad->control_reg);  in dra7_apll_disable()
103 	v &= ~ad->enable_mask;  in dra7_apll_disable()
104 	v |= APLL_AUTO_IDLE << __ffs(ad->enable_mask);  in dra7_apll_disable()
105 	ti_clk_ll_ops->clk_writel(v, ad->control_reg);  in dra7_apll_disable()
111 	struct dpll_data *ad;  in dra7_apll_is_enabled()  local
114 	ad = clk->dpll_data;  in dra7_apll_is_enabled()
116 	v = ti_clk_ll_ops->clk_readl(ad->control_reg);  in dra7_apll_is_enabled()
117 	v &= ad->enable_mask;  in dra7_apll_is_enabled()
119 	v >>= __ffs(ad->enable_mask);  in dra7_apll_is_enabled()
140 	struct dpll_data *ad = clk_hw->dpll_data;  in omap_clk_register_apll()  local
143 	ad->clk_ref = of_clk_get(node, 0);  in omap_clk_register_apll()
144 	ad->clk_bypass = of_clk_get(node, 1);  in omap_clk_register_apll()
146 	if (IS_ERR(ad->clk_ref) || IS_ERR(ad->clk_bypass)) {  in omap_clk_register_apll()
172 	struct dpll_data *ad = NULL;  in of_dra7_apll_setup()  local
177 	ad = kzalloc(sizeof(*ad), GFP_KERNEL);  in of_dra7_apll_setup()
180 	if (!ad || !clk_hw || !init)  in of_dra7_apll_setup()
183 	clk_hw->dpll_data = ad;  in of_dra7_apll_setup()
204 	ad->control_reg = ti_clk_get_reg_addr(node, 0);  in of_dra7_apll_setup()
205 	ad->idlest_reg = ti_clk_get_reg_addr(node, 1);  in of_dra7_apll_setup()
207 	if (IS_ERR(ad->control_reg) || IS_ERR(ad->idlest_reg))  in of_dra7_apll_setup()
210 	ad->idlest_mask = 0x1;  in of_dra7_apll_setup()
211 	ad->enable_mask = 0x3;  in of_dra7_apll_setup()
218 	kfree(ad);  in of_dra7_apll_setup()
230 	struct dpll_data *ad = clk->dpll_data;  in omap2_apll_is_enabled()  local
233 	v = ti_clk_ll_ops->clk_readl(ad->control_reg);  in omap2_apll_is_enabled()
234 	v &= ad->enable_mask;  in omap2_apll_is_enabled()
236 	v >>= __ffs(ad->enable_mask);  in omap2_apll_is_enabled()
255 	struct dpll_data *ad = clk->dpll_data;  in omap2_apll_enable()  local
259 	v = ti_clk_ll_ops->clk_readl(ad->control_reg);  in omap2_apll_enable()
260 	v &= ~ad->enable_mask;  in omap2_apll_enable()
261 	v |= OMAP2_EN_APLL_LOCKED << __ffs(ad->enable_mask);  in omap2_apll_enable()
262 	ti_clk_ll_ops->clk_writel(v, ad->control_reg);  in omap2_apll_enable()
265 		v = ti_clk_ll_ops->clk_readl(ad->idlest_reg);  in omap2_apll_enable()
266 		if (v & ad->idlest_mask)  in omap2_apll_enable()
286 	struct dpll_data *ad = clk->dpll_data;  in omap2_apll_disable()  local
289 	v = ti_clk_ll_ops->clk_readl(ad->control_reg);  in omap2_apll_disable()
290 	v &= ~ad->enable_mask;  in omap2_apll_disable()
291 	v |= OMAP2_EN_APLL_STOPPED << __ffs(ad->enable_mask);  in omap2_apll_disable()
292 	ti_clk_ll_ops->clk_writel(v, ad->control_reg);  in omap2_apll_disable()
304 	struct dpll_data *ad = clk->dpll_data;  in omap2_apll_set_autoidle()  local
307 	v = ti_clk_ll_ops->clk_readl(ad->autoidle_reg);  in omap2_apll_set_autoidle()
308 	v &= ~ad->autoidle_mask;  in omap2_apll_set_autoidle()
309 	v |= val << __ffs(ad->autoidle_mask);  in omap2_apll_set_autoidle()
310 	ti_clk_ll_ops->clk_writel(v, ad->control_reg);  in omap2_apll_set_autoidle()
333 	struct dpll_data *ad = NULL;  in of_omap2_apll_setup()  local
340 	ad = kzalloc(sizeof(*ad), GFP_KERNEL);  in of_omap2_apll_setup()
344 	if (!ad || !clk_hw || !init)  in of_omap2_apll_setup()
347 	clk_hw->dpll_data = ad;  in of_omap2_apll_setup()
374 	ad->enable_mask = 0x3 << val;  in of_omap2_apll_setup()
375 	ad->autoidle_mask = 0x3 << val;  in of_omap2_apll_setup()
382 	ad->idlest_mask = 1 << val;  in of_omap2_apll_setup()
384 	ad->control_reg = ti_clk_get_reg_addr(node, 0);  in of_omap2_apll_setup()
385 	ad->autoidle_reg = ti_clk_get_reg_addr(node, 1);  in of_omap2_apll_setup()
386 	ad->idlest_reg = ti_clk_get_reg_addr(node, 2);  in of_omap2_apll_setup()
388 	if (IS_ERR(ad->control_reg) || IS_ERR(ad->autoidle_reg) ||  in of_omap2_apll_setup()
389 	    IS_ERR(ad->idlest_reg))  in of_omap2_apll_setup()
399 	kfree(ad);  in of_omap2_apll_setup()