Lines Matching defs:tegra_clk_pll_params

211 struct tegra_clk_pll_params {  struct
212 	unsigned long	input_min;
213 	unsigned long	input_max;
214 	unsigned long	cf_min;
215 	unsigned long	cf_max;
216 	unsigned long	vco_min;
217 	unsigned long	vco_max;
219 	u32		base_reg;
220 	u32		misc_reg;
221 	u32		lock_reg;
222 	u32		lock_mask;
223 	u32		lock_enable_bit_idx;
224 	u32		iddq_reg;
225 	u32		iddq_bit_idx;
226 	u32		aux_reg;
227 	u32		dyn_ramp_reg;
228 	u32		ext_misc_reg[3];
229 	u32		pmc_divnm_reg;
230 	u32		pmc_divp_reg;
231 	u32		flags;
232 	int		stepa_shift;
233 	int		stepb_shift;
234 	int		lock_delay;
235 	int		max_p;
236 	struct pdiv_map *pdiv_tohw;
237 	struct div_nmp	*div_nmp;
238 	struct tegra_clk_pll_freq_table	*freq_table;
239 	unsigned long	fixed_rate;