1023 static struct clk **clks;  variable
1115 	clks[TEGRA124_CLK_XUSB_SS_DIV2] = clk;  in tegra124_periph_clk_init()
1119 	clks[TEGRA124_CLK_PLL_D_DSI_OUT] = clk;  in tegra124_periph_clk_init()
1124 	clks[TEGRA124_CLK_DSIA] = clk;  in tegra124_periph_clk_init()
1129 	clks[TEGRA124_CLK_DSIB] = clk;  in tegra124_periph_clk_init()
1133 	clks[TEGRA124_CLK_MC] = clk;  in tegra124_periph_clk_init()
1139 	clks[TEGRA124_CLK_CML0] = clk;  in tegra124_periph_clk_init()
1145 	clks[TEGRA124_CLK_CML1] = clk;  in tegra124_periph_clk_init()
1160 	clks[TEGRA124_CLK_PLL_C] = clk;  in tegra124_pll_init()
1170 	clks[TEGRA124_CLK_PLL_C_OUT1] = clk;  in tegra124_pll_init()
1176 	clks[TEGRA124_CLK_PLL_C_UD] = clk;  in tegra124_pll_init()
1182 	clks[TEGRA124_CLK_PLL_C2] = clk;  in tegra124_pll_init()
1188 	clks[TEGRA124_CLK_PLL_C3] = clk;  in tegra124_pll_init()
1195 	clks[TEGRA124_CLK_PLL_M] = clk;  in tegra124_pll_init()
1205 	clks[TEGRA124_CLK_PLL_M_OUT1] = clk;  in tegra124_pll_init()
1211 	clks[TEGRA124_CLK_PLL_M_UD] = clk;  in tegra124_pll_init()
1221 	clks[TEGRA124_CLK_PLL_U] = clk;  in tegra124_pll_init()
1230 	clks[TEGRA124_CLK_PLL_U_480M] = clk;  in tegra124_pll_init()
1236 	clks[TEGRA124_CLK_PLL_U_60M] = clk;  in tegra124_pll_init()
1242 	clks[TEGRA124_CLK_PLL_U_48M] = clk;  in tegra124_pll_init()
1248 	clks[TEGRA124_CLK_PLL_U_12M] = clk;  in tegra124_pll_init()
1254 	clks[TEGRA124_CLK_PLL_D] = clk;  in tegra124_pll_init()
1260 	clks[TEGRA124_CLK_PLL_D_OUT0] = clk;  in tegra124_pll_init()
1266 	clks[TEGRA124_CLK_PLL_RE_VCO] = clk;  in tegra124_pll_init()
1272 	clks[TEGRA124_CLK_PLL_RE_OUT] = clk;  in tegra124_pll_init()
1278 	clks[TEGRA124_CLK_PLL_E] = clk;  in tegra124_pll_init()
1284 	clks[TEGRA124_CLK_PLL_C4] = clk;  in tegra124_pll_init()
1290 	clks[TEGRA124_CLK_PLL_DP] = clk;  in tegra124_pll_init()
1296 	clks[TEGRA124_CLK_PLL_D2] = clk;  in tegra124_pll_init()
1302 	clks[TEGRA124_CLK_PLL_D2_OUT0] = clk;  in tegra124_pll_init()
1434 	tegra_init_from_table(common_init_table, clks, TEGRA124_CLK_CLK_MAX);  in tegra124_clock_apply_init_table()
1435 	tegra_init_from_table(tegra124_init_table, clks, TEGRA124_CLK_CLK_MAX);  in tegra124_clock_apply_init_table()
1510 	tegra_init_from_table(common_init_table, clks, TEGRA124_CLK_CLK_MAX);  in tegra132_clock_apply_init_table()
1511 	tegra_init_from_table(tegra132_init_table, clks, TEGRA124_CLK_CLK_MAX);  in tegra132_clock_apply_init_table()
1549 	clks = tegra_clk_init(clk_base, TEGRA124_CLK_CLK_MAX,  in tegra124_132_clock_init_pre()
1551 	if (!clks)  in tegra124_132_clock_init_pre()
1591 	clks[TEGRA124_CLK_EMC] = tegra_clk_register_emc(clk_base, np,  in tegra124_132_clock_init_post()