130 #define MUX(_name, _parents, _offset,	\  argument
132 	TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
134 			_clk_num,  _gate_flags, _clk_id, _parents##_idx, 0,\
137 #define MUX_FLAGS(_name, _parents, _offset,\  argument
139 	TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
141 			_clk_num, _gate_flags, _clk_id, _parents##_idx, flags,\
144 #define MUX8(_name, _parents, _offset, \  argument
146 	TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
148 			_clk_num, _gate_flags, _clk_id, _parents##_idx, 0,\
151 #define MUX8_NOGATE_LOCK(_name, _parents, _offset, _clk_id, _lock)	\  argument
152 	TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,	\
155 			      _parents##_idx, 0, _lock)
157 #define INT(_name, _parents, _offset,	\  argument
159 	TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
162 			_clk_id, _parents##_idx, 0, NULL)
164 #define INT_FLAGS(_name, _parents, _offset,\  argument
166 	TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
169 			_clk_id, _parents##_idx, flags, NULL)
171 #define INT8(_name, _parents, _offset,\  argument
173 	TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
176 			_clk_id, _parents##_idx, 0, NULL)
178 #define UART(_name, _parents, _offset,\  argument
180 	TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
183 			_parents##_idx, 0, NULL)
185 #define I2C(_name, _parents, _offset,\  argument
187 	TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
189 			_clk_num, 0, _clk_id, _parents##_idx, 0, NULL)
191 #define XUSB(_name, _parents, _offset, \  argument
193 	TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset, \
196 			_clk_id, _parents##_idx, 0, NULL)
205 #define NODIV(_name, _parents, _offset, \  argument
208 	TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
211 			_clk_id, _parents##_idx, 0, _lock)