Lines Matching refs:_name
130 #define MUX(_name, _parents, _offset, \ argument
132 TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
137 #define MUX_FLAGS(_name, _parents, _offset,\ argument
139 TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
144 #define MUX8(_name, _parents, _offset, \ argument
146 TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
151 #define MUX8_NOGATE_LOCK(_name, _parents, _offset, _clk_id, _lock) \ argument
152 TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset, \
157 #define INT(_name, _parents, _offset, \ argument
159 TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
164 #define INT_FLAGS(_name, _parents, _offset,\ argument
166 TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
171 #define INT8(_name, _parents, _offset,\ argument
173 TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
178 #define UART(_name, _parents, _offset,\ argument
180 TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
185 #define I2C(_name, _parents, _offset,\ argument
187 TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
191 #define XUSB(_name, _parents, _offset, \ argument
193 TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset, \
198 #define AUDIO(_name, _offset, _clk_num,\ argument
200 TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, mux_d_audio_clk, \
205 #define NODIV(_name, _parents, _offset, \ argument
208 TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
213 #define GATE(_name, _parent_name, \ argument
216 .name = _name, \