Lines Matching refs:periph
26 struct tegra_clk_periph *periph = to_clk_periph(hw); in clk_periph_get_parent() local
27 const struct clk_ops *mux_ops = periph->mux_ops; in clk_periph_get_parent()
28 struct clk_hw *mux_hw = &periph->mux.hw; in clk_periph_get_parent()
37 struct tegra_clk_periph *periph = to_clk_periph(hw); in clk_periph_set_parent() local
38 const struct clk_ops *mux_ops = periph->mux_ops; in clk_periph_set_parent()
39 struct clk_hw *mux_hw = &periph->mux.hw; in clk_periph_set_parent()
49 struct tegra_clk_periph *periph = to_clk_periph(hw); in clk_periph_recalc_rate() local
50 const struct clk_ops *div_ops = periph->div_ops; in clk_periph_recalc_rate()
51 struct clk_hw *div_hw = &periph->divider.hw; in clk_periph_recalc_rate()
61 struct tegra_clk_periph *periph = to_clk_periph(hw); in clk_periph_round_rate() local
62 const struct clk_ops *div_ops = periph->div_ops; in clk_periph_round_rate()
63 struct clk_hw *div_hw = &periph->divider.hw; in clk_periph_round_rate()
73 struct tegra_clk_periph *periph = to_clk_periph(hw); in clk_periph_set_rate() local
74 const struct clk_ops *div_ops = periph->div_ops; in clk_periph_set_rate()
75 struct clk_hw *div_hw = &periph->divider.hw; in clk_periph_set_rate()
84 struct tegra_clk_periph *periph = to_clk_periph(hw); in clk_periph_is_enabled() local
85 const struct clk_ops *gate_ops = periph->gate_ops; in clk_periph_is_enabled()
86 struct clk_hw *gate_hw = &periph->gate.hw; in clk_periph_is_enabled()
95 struct tegra_clk_periph *periph = to_clk_periph(hw); in clk_periph_enable() local
96 const struct clk_ops *gate_ops = periph->gate_ops; in clk_periph_enable()
97 struct clk_hw *gate_hw = &periph->gate.hw; in clk_periph_enable()
106 struct tegra_clk_periph *periph = to_clk_periph(hw); in clk_periph_disable() local
107 const struct clk_ops *gate_ops = periph->gate_ops; in clk_periph_disable()
108 struct clk_hw *gate_hw = &periph->gate.hw; in clk_periph_disable()
142 struct tegra_clk_periph *periph, in _tegra_clk_register_periph() argument
149 bool div = !(periph->gate.flags & TEGRA_PERIPH_NO_DIV); in _tegra_clk_register_periph()
151 if (periph->gate.flags & TEGRA_PERIPH_NO_DIV) { in _tegra_clk_register_periph()
154 } else if (periph->gate.flags & TEGRA_PERIPH_NO_GATE) in _tegra_clk_register_periph()
164 bank = get_reg_bank(periph->gate.clk_num); in _tegra_clk_register_periph()
169 periph->hw.init = &init; in _tegra_clk_register_periph()
170 periph->magic = TEGRA_CLK_PERIPH_MAGIC; in _tegra_clk_register_periph()
171 periph->mux.reg = clk_base + offset; in _tegra_clk_register_periph()
172 periph->divider.reg = div ? (clk_base + offset) : NULL; in _tegra_clk_register_periph()
173 periph->gate.clk_base = clk_base; in _tegra_clk_register_periph()
174 periph->gate.regs = bank; in _tegra_clk_register_periph()
175 periph->gate.enable_refcnt = periph_clk_enb_refcnt; in _tegra_clk_register_periph()
177 clk = clk_register(NULL, &periph->hw); in _tegra_clk_register_periph()
181 periph->mux.hw.clk = clk; in _tegra_clk_register_periph()
182 periph->divider.hw.clk = div ? clk : NULL; in _tegra_clk_register_periph()
183 periph->gate.hw.clk = clk; in _tegra_clk_register_periph()
190 struct tegra_clk_periph *periph, void __iomem *clk_base, in tegra_clk_register_periph() argument
194 periph, clk_base, offset, flags); in tegra_clk_register_periph()
199 struct tegra_clk_periph *periph, void __iomem *clk_base, in tegra_clk_register_periph_nodiv() argument
202 periph->gate.flags |= TEGRA_PERIPH_NO_DIV; in tegra_clk_register_periph_nodiv()
204 periph, clk_base, offset, CLK_SET_RATE_PARENT); in tegra_clk_register_periph_nodiv()