30 #define read_enb(gate) \  argument
31 	readl_relaxed(gate->clk_base + (gate->regs->enb_reg))
32 #define write_enb_set(val, gate) \  argument
33 	writel_relaxed(val, gate->clk_base + (gate->regs->enb_set_reg))
34 #define write_enb_clr(val, gate) \  argument
35 	writel_relaxed(val, gate->clk_base + (gate->regs->enb_clr_reg))
37 #define read_rst(gate) \  argument
38 	readl_relaxed(gate->clk_base + (gate->regs->rst_reg))
39 #define write_rst_clr(val, gate) \  argument
40 	writel_relaxed(val, gate->clk_base + (gate->regs->rst_clr_reg))
42 #define periph_clk_to_bit(gate) (1 << (gate->clk_num % 32))  argument
49 	struct tegra_clk_periph_gate *gate = to_clk_periph_gate(hw);  in clk_periph_is_enabled()  local
52 	if (!(read_enb(gate) & periph_clk_to_bit(gate)))  in clk_periph_is_enabled()
55 	if (!(gate->flags & TEGRA_PERIPH_NO_RESET))  in clk_periph_is_enabled()
56 		if (read_rst(gate) & periph_clk_to_bit(gate))  in clk_periph_is_enabled()
64 	struct tegra_clk_periph_gate *gate = to_clk_periph_gate(hw);  in clk_periph_enable()  local
69 	gate->enable_refcnt[gate->clk_num]++;  in clk_periph_enable()
70 	if (gate->enable_refcnt[gate->clk_num] > 1) {  in clk_periph_enable()
75 	write_enb_set(periph_clk_to_bit(gate), gate);  in clk_periph_enable()
78 	if (!(gate->flags & TEGRA_PERIPH_NO_RESET) &&  in clk_periph_enable()
79 	    !(gate->flags & TEGRA_PERIPH_MANUAL_RESET)) {  in clk_periph_enable()
80 		if (read_rst(gate) & periph_clk_to_bit(gate)) {  in clk_periph_enable()
82 			write_rst_clr(periph_clk_to_bit(gate), gate);  in clk_periph_enable()
86 	if (gate->flags & TEGRA_PERIPH_WAR_1005168) {  in clk_periph_enable()
87 		writel_relaxed(0, gate->clk_base + LVL2_CLK_GATE_OVRE);  in clk_periph_enable()
88 		writel_relaxed(BIT(22), gate->clk_base + LVL2_CLK_GATE_OVRE);  in clk_periph_enable()
90 		writel_relaxed(0, gate->clk_base + LVL2_CLK_GATE_OVRE);  in clk_periph_enable()
100 	struct tegra_clk_periph_gate *gate = to_clk_periph_gate(hw);  in clk_periph_disable()  local
105 	gate->enable_refcnt[gate->clk_num]--;  in clk_periph_disable()
106 	if (gate->enable_refcnt[gate->clk_num] > 0) {  in clk_periph_disable()
116 	if (gate->flags & TEGRA_PERIPH_ON_APB)  in clk_periph_disable()
119 	write_enb_clr(periph_clk_to_bit(gate), gate);  in clk_periph_disable()
134 	struct tegra_clk_periph_gate *gate;  in tegra_clk_register_periph_gate()  local
143 	gate = kzalloc(sizeof(*gate), GFP_KERNEL);  in tegra_clk_register_periph_gate()
144 	if (!gate) {  in tegra_clk_register_periph_gate()
155 	gate->magic = TEGRA_CLK_PERIPH_GATE_MAGIC;  in tegra_clk_register_periph_gate()
156 	gate->clk_base = clk_base;  in tegra_clk_register_periph_gate()
157 	gate->clk_num = clk_num;  in tegra_clk_register_periph_gate()
158 	gate->flags = gate_flags;  in tegra_clk_register_periph_gate()
159 	gate->enable_refcnt = enable_refcnt;  in tegra_clk_register_periph_gate()
160 	gate->regs = pregs;  in tegra_clk_register_periph_gate()
163 	gate->hw.init = &init;  in tegra_clk_register_periph_gate()
165 	clk = clk_register(NULL, &gate->hw);  in tegra_clk_register_periph_gate()
167 		kfree(gate);  in tegra_clk_register_periph_gate()