97 	struct tegra_clk_emc *tegra;  in emc_recalc_rate()  local
100 	tegra = container_of(hw, struct tegra_clk_emc, hw);  in emc_recalc_rate()
108 	val = readl(tegra->clk_regs + CLK_SOURCE_EMC);  in emc_recalc_rate()
121 	struct tegra_clk_emc *tegra;  in emc_determine_rate()  local
126 	tegra = container_of(hw, struct tegra_clk_emc, hw);  in emc_determine_rate()
128 	for (i = 0; i < tegra->num_timings; i++) {  in emc_determine_rate()
129 		if (tegra->timings[i].ram_code != ram_code)  in emc_determine_rate()
132 		timing = tegra->timings + i;  in emc_determine_rate()
136 			req->rate = tegra->timings[i - 1].rate;  in emc_determine_rate()
160 	struct tegra_clk_emc *tegra;  in emc_get_parent()  local
163 	tegra = container_of(hw, struct tegra_clk_emc, hw);  in emc_get_parent()
165 	val = readl(tegra->clk_regs + CLK_SOURCE_EMC);  in emc_get_parent()
171 static struct tegra_emc *emc_ensure_emc_driver(struct tegra_clk_emc *tegra)  in emc_ensure_emc_driver()  argument
175 	if (tegra->emc)  in emc_ensure_emc_driver()
176 		return tegra->emc;  in emc_ensure_emc_driver()
178 	if (!tegra->emc_node)  in emc_ensure_emc_driver()
181 	pdev = of_find_device_by_node(tegra->emc_node);  in emc_ensure_emc_driver()
188 	of_node_put(tegra->emc_node);  in emc_ensure_emc_driver()
189 	tegra->emc_node = NULL;  in emc_ensure_emc_driver()
191 	tegra->emc = platform_get_drvdata(pdev);  in emc_ensure_emc_driver()
192 	if (!tegra->emc) {  in emc_ensure_emc_driver()
197 	return tegra->emc;  in emc_ensure_emc_driver()
200 static int emc_set_timing(struct tegra_clk_emc *tegra,  in emc_set_timing()  argument
207 	struct tegra_emc *emc = emc_ensure_emc_driver(tegra);  in emc_set_timing()
215 	if (emc_get_parent(&tegra->hw) == timing->parent_index &&  in emc_set_timing()
221 	tegra->changing_timing = true;  in emc_set_timing()
244 	spin_lock_irqsave(tegra->lock, flags);  in emc_set_timing()
246 	car_value = readl(tegra->clk_regs + CLK_SOURCE_EMC);  in emc_set_timing()
254 	writel(car_value, tegra->clk_regs + CLK_SOURCE_EMC);  in emc_set_timing()
256 	spin_unlock_irqrestore(tegra->lock, flags);  in emc_set_timing()
260 	clk_hw_reparent(&tegra->hw, __clk_get_hw(timing->parent));  in emc_set_timing()
261 	clk_disable_unprepare(tegra->prev_parent);  in emc_set_timing()
263 	tegra->prev_parent = timing->parent;  in emc_set_timing()
264 	tegra->changing_timing = false;  in emc_set_timing()
275 static struct emc_timing *get_backup_timing(struct tegra_clk_emc *tegra,  in get_backup_timing()  argument
282 	for (i = timing_index+1; i < tegra->num_timings; i++) {  in get_backup_timing()
283 		timing = tegra->timings + i;  in get_backup_timing()
289 		      tegra->timings[timing_index].parent_index])  in get_backup_timing()
294 		timing = tegra->timings + i;  in get_backup_timing()
300 		      tegra->timings[timing_index].parent_index])  in get_backup_timing()
310 	struct tegra_clk_emc *tegra;  in emc_set_rate()  local
315 	tegra = container_of(hw, struct tegra_clk_emc, hw);  in emc_set_rate()
325 	if (tegra->changing_timing)  in emc_set_rate()
328 	for (i = 0; i < tegra->num_timings; i++) {  in emc_set_rate()
329 		if (tegra->timings[i].rate == rate &&  in emc_set_rate()
330 		    tegra->timings[i].ram_code == ram_code) {  in emc_set_rate()
331 			timing = tegra->timings + i;  in emc_set_rate()
351 		backup_timing = get_backup_timing(tegra, i);  in emc_set_rate()
360 		err = emc_set_timing(tegra, backup_timing);  in emc_set_rate()
367 	return emc_set_timing(tegra, timing);  in emc_set_rate()
372 static int load_one_timing_from_dt(struct tegra_clk_emc *tegra,  in load_one_timing_from_dt()  argument
434 static int load_timings_from_dt(struct tegra_clk_emc *tegra,  in load_timings_from_dt()  argument
442 	tegra->timings = kcalloc(child_count, sizeof(struct emc_timing),  in load_timings_from_dt()
444 	if (!tegra->timings)  in load_timings_from_dt()
447 	tegra->num_timings = child_count;  in load_timings_from_dt()
450 		struct emc_timing *timing = tegra->timings + (i++);  in load_timings_from_dt()
452 		err = load_one_timing_from_dt(tegra, timing, child);  in load_timings_from_dt()
459 	sort(tegra->timings, tegra->num_timings, sizeof(struct emc_timing),  in load_timings_from_dt()
475 	struct tegra_clk_emc *tegra;  in tegra_clk_register_emc()  local
482 	tegra = kcalloc(1, sizeof(*tegra), GFP_KERNEL);  in tegra_clk_register_emc()
483 	if (!tegra)  in tegra_clk_register_emc()
486 	tegra->clk_regs = base;  in tegra_clk_register_emc()
487 	tegra->lock = lock;  in tegra_clk_register_emc()
489 	tegra->num_timings = 0;  in tegra_clk_register_emc()
501 		err = load_timings_from_dt(tegra, node, node_ram_code);  in tegra_clk_register_emc()
508 	if (tegra->num_timings == 0)  in tegra_clk_register_emc()
511 	tegra->emc_node = of_parse_phandle(np,  in tegra_clk_register_emc()
513 	if (!tegra->emc_node)  in tegra_clk_register_emc()
522 	tegra->hw.init = &init;  in tegra_clk_register_emc()
524 	clk = clk_register(NULL, &tegra->hw);  in tegra_clk_register_emc()
528 	tegra->prev_parent = clk_hw_get_parent_by_index(  in tegra_clk_register_emc()
529 		&tegra->hw, emc_get_parent(&tegra->hw))->clk;  in tegra_clk_register_emc()
530 	tegra->changing_timing = false;  in tegra_clk_register_emc()