Lines Matching refs:parent_rate
72 unsigned long rate, parent_rate; member
95 unsigned long parent_rate) in emc_recalc_rate() argument
106 parent_rate = clk_hw_get_rate(clk_hw_get_parent(hw)); in emc_recalc_rate()
111 return parent_rate / (div + 2) * 2; in emc_recalc_rate()
213 timing->parent_rate, __clk_get_name(timing->parent)); in emc_set_timing()
216 clk_get_rate(timing->parent) != timing->parent_rate) { in emc_set_timing()
223 err = clk_set_rate(timing->parent, timing->parent_rate); in emc_set_timing()
226 __clk_get_name(timing->parent), timing->parent_rate, in emc_set_timing()
238 div = timing->parent_rate / (timing->rate / 2) - 2; in emc_set_timing()
308 unsigned long parent_rate) in emc_set_rate() argument
343 clk_get_rate(timing->parent) != timing->parent_rate) { in emc_set_rate()
394 timing->parent_rate = tmp; in load_one_timing_from_dt()