Lines Matching refs:divider
32 static int get_div(struct tegra_clk_frac_div *divider, unsigned long rate, in get_div() argument
36 u8 flags = divider->flags; in get_div()
42 mul = get_mul(divider); in get_div()
60 if (divider_ux1 > get_max_div(divider)) in get_div()
61 return get_max_div(divider); in get_div()
69 struct tegra_clk_frac_div *divider = to_clk_frac_div(hw); in clk_frac_div_recalc_rate() local
74 reg = readl_relaxed(divider->reg) >> divider->shift; in clk_frac_div_recalc_rate()
75 div = reg & div_mask(divider); in clk_frac_div_recalc_rate()
77 mul = get_mul(divider); in clk_frac_div_recalc_rate()
90 struct tegra_clk_frac_div *divider = to_clk_frac_div(hw); in clk_frac_div_round_rate() local
97 div = get_div(divider, rate, output_rate); in clk_frac_div_round_rate()
101 mul = get_mul(divider); in clk_frac_div_round_rate()
109 struct tegra_clk_frac_div *divider = to_clk_frac_div(hw); in clk_frac_div_set_rate() local
114 div = get_div(divider, rate, parent_rate); in clk_frac_div_set_rate()
118 if (divider->lock) in clk_frac_div_set_rate()
119 spin_lock_irqsave(divider->lock, flags); in clk_frac_div_set_rate()
121 val = readl_relaxed(divider->reg); in clk_frac_div_set_rate()
122 val &= ~(div_mask(divider) << divider->shift); in clk_frac_div_set_rate()
123 val |= div << divider->shift; in clk_frac_div_set_rate()
125 if (divider->flags & TEGRA_DIVIDER_UART) { in clk_frac_div_set_rate()
132 if (divider->flags & TEGRA_DIVIDER_FIXED) in clk_frac_div_set_rate()
133 val |= pll_out_override(divider); in clk_frac_div_set_rate()
135 writel_relaxed(val, divider->reg); in clk_frac_div_set_rate()
137 if (divider->lock) in clk_frac_div_set_rate()
138 spin_unlock_irqrestore(divider->lock, flags); in clk_frac_div_set_rate()
154 struct tegra_clk_frac_div *divider; in tegra_clk_register_divider() local
158 divider = kzalloc(sizeof(*divider), GFP_KERNEL); in tegra_clk_register_divider()
159 if (!divider) { in tegra_clk_register_divider()
171 divider->reg = reg; in tegra_clk_register_divider()
172 divider->shift = shift; in tegra_clk_register_divider()
173 divider->width = width; in tegra_clk_register_divider()
174 divider->frac_width = frac_width; in tegra_clk_register_divider()
175 divider->lock = lock; in tegra_clk_register_divider()
176 divider->flags = clk_divider_flags; in tegra_clk_register_divider()
179 divider->hw.init = &init; in tegra_clk_register_divider()
181 clk = clk_register(NULL, ÷r->hw); in tegra_clk_register_divider()
183 kfree(divider); in tegra_clk_register_divider()