263 	struct tegra_dfll_soc_data	*soc;  member
445 	dfll_writel(td, td->soc->tune0_low, DFLL_TUNE0);  in dfll_tune_low()
446 	dfll_writel(td, td->soc->tune1, DFLL_TUNE1);  in dfll_tune_low()
449 	if (td->soc->set_clock_trimmers_low)  in dfll_tune_low()
450 		td->soc->set_clock_trimmers_low();  in dfll_tune_low()
637 	opp = dev_pm_opp_find_freq_ceil(td->soc->dev, &rate);  in find_lut_index_for_rate()
1353 	if (td->soc->init_clock_trimmers)  in dfll_init()
1354 		td->soc->init_clock_trimmers();  in dfll_init()
1446 	opp = dev_pm_opp_find_freq_floor(td->soc->dev, &rate);  in dfll_build_i2c_lut()
1453 	v = td->soc->min_millivolts * 1000;  in dfll_build_i2c_lut()
1460 		opp = dev_pm_opp_find_freq_ceil(td->soc->dev, &rate);  in dfll_build_i2c_lut()
1465 		if (v_opp <= td->soc->min_millivolts * 1000)  in dfll_build_i2c_lut()
1494 			td->soc->min_millivolts);  in dfll_build_i2c_lut()
1614 			struct tegra_dfll_soc_data *soc)  in tegra_dfll_register()  argument
1620 	if (!soc) {  in tegra_dfll_register()
1631 	td->soc = soc;  in tegra_dfll_register()