Lines Matching refs:__clk_get_name
361 pr_debug("%s:%s enabled\n", __clk_get_name(hw->clk), __func__); in __clkgen_pll_enable()
396 pr_debug("%s:%s disabled\n", __clk_get_name(hw->clk), __func__); in __clkgen_pll_disable()
556 __clk_get_name(hw->clk), rate); in round_rate_stm_pll3200c32()
561 __func__, __clk_get_name(hw->clk), in round_rate_stm_pll3200c32()
583 __func__, __clk_get_name(hw->clk), in set_rate_stm_pll3200c32()
723 pr_debug("%s:%s rate %lu\n", __clk_get_name(hw->clk), __func__, rate); in recalc_stm_pll4600c28()
737 __clk_get_name(hw->clk), rate); in round_rate_stm_pll4600c28()
742 __func__, __clk_get_name(hw->clk), in round_rate_stm_pll4600c28()
764 __clk_get_name(hw->clk), rate); in set_rate_stm_pll4600c28()
769 __func__, __clk_get_name(hw->clk), in set_rate_stm_pll4600c28()
873 __clk_get_name(clk), in clkgen_pll_register()
874 __clk_get_name(clk_get_parent(clk)), in clkgen_pll_register()
890 __clk_get_name(clk), in clkgen_c65_lsdiv_register()
891 __clk_get_name(clk_get_parent(clk)), in clkgen_c65_lsdiv_register()
964 clk_data->clks[1] = clkgen_c65_lsdiv_register(__clk_get_name in clkgena_c65_pll_setup()
1039 __clk_get_name(clk), in clkgen_odf_register()
1040 __clk_get_name(clk_get_parent(clk)), in clkgen_odf_register()
1124 pll_name = __clk_get_name(clk); in clkgen_c32_pll_setup()