133 	struct clkgen_field nsb[QUADFS_MAX_CHAN];  member
168 	.nsb	= { CLKGEN_FIELD(0x0, 0x1, 10),
204 	.nsb	= { CLKGEN_FIELD(0x0, 0x1, 10),
240 	.nsb	= { CLKGEN_FIELD(0x0, 0x1, 10),
276 	.nsb	= { CLKGEN_FIELD(0x0, 0x1, 10),
317 	.nsb	= { CLKGEN_FIELD(0x2f0, 0x1, 8),
369 	.nsb	= { CLKGEN_FIELD(0x2a0, 0x1, 8),
755 	CLKGEN_WRITE(fs, nsb[fs->chan], !fs->data->standby_polarity);  in quadfs_fsynth_enable()
778 	CLKGEN_WRITE(fs, nsb[fs->chan], fs->data->standby_polarity);  in quadfs_fsynth_disable()
787 	u32 nsb = CLKGEN_READ(fs, nsb[fs->chan]);  in quadfs_fsynth_is_enabled()  local
790 		 __func__, clk_hw_get_name(hw), nsb);  in quadfs_fsynth_is_enabled()
792 	return fs->data->standby_polarity ? !nsb : !!nsb;  in quadfs_fsynth_is_enabled()