60 static inline unsigned long clkc_readl(unsigned reg)  in clkc_readl()  function
82 	if (clkc_readl(regcfg2) & BIT(2)) {  in pll_clk_recalc_rate()
87 		u32 cfg0 = clkc_readl(clk->regofs);  in pll_clk_recalc_rate()
157 	while (!(clkc_readl(reg) & BIT(6)))  in pll_clk_set_rate()
300 	u32 cfg = clkc_readl(clk->regofs);  in dmn_clk_get_parent()
314 	u32 cfg = clkc_readl(clk->regofs);  in dmn_clk_set_parent()
323 	while (clkc_readl(clk->regofs) & BIT(3))  in dmn_clk_set_parent()
336 	u32 cfg = clkc_readl(clk->regofs);  in dmn_clk_recalc_rate()
392 	reg = clkc_readl(clk->regofs);  in dmn_clk_set_rate()
398 	while (clkc_readl(clk->regofs) & BIT(25))  in dmn_clk_set_rate()
642 	return !!(clkc_readl(reg) & BIT(bit));  in std_clk_is_enabled()
657 	val = clkc_readl(reg) | BIT(bit);  in std_clk_enable()
674 	val = clkc_readl(reg) & ~BIT(bit);  in std_clk_disable()