Lines Matching refs:__initdata
75 static unsigned long s3c64xx_clk_regs[] __initdata = {
92 static unsigned long s3c6410_clk_regs[] __initdata = {
178 FIXED_RATE_CLOCKS(s3c64xx_fixed_rate_ext_clks) __initdata = {
184 FIXED_RATE_CLOCKS(s3c64xx_fixed_rate_clks) __initdata = {
190 MUX_CLOCKS(s3c64xx_mux_clks) __initdata = {
207 MUX_CLOCKS(s3c6400_mux_clks) __initdata = {
215 MUX_CLOCKS(s3c6410_mux_clks) __initdata = {
226 DIV_CLOCKS(s3c64xx_div_clks) __initdata = {
250 DIV_CLOCKS(s3c6400_div_clks) __initdata = {
255 DIV_CLOCKS(s3c6410_div_clks) __initdata = {
262 GATE_CLOCKS(s3c64xx_gate_clks) __initdata = {
342 GATE_CLOCKS(s3c6400_gate_clks) __initdata = {
348 GATE_CLOCKS(s3c6410_gate_clks) __initdata = {
366 static struct samsung_pll_clock s3c64xx_pll_clks[] __initdata = {