Lines Matching refs:ARRAY_SIZE
139 cmu.nr_mux_clks = ARRAY_SIZE(aud_mux_clks); in exynos5260_clk_aud_init()
141 cmu.nr_div_clks = ARRAY_SIZE(aud_div_clks); in exynos5260_clk_aud_init()
143 cmu.nr_gate_clks = ARRAY_SIZE(aud_gate_clks); in exynos5260_clk_aud_init()
146 cmu.nr_clk_regs = ARRAY_SIZE(aud_clk_regs); in exynos5260_clk_aud_init()
329 cmu.nr_mux_clks = ARRAY_SIZE(disp_mux_clks); in exynos5260_clk_disp_init()
331 cmu.nr_div_clks = ARRAY_SIZE(disp_div_clks); in exynos5260_clk_disp_init()
333 cmu.nr_gate_clks = ARRAY_SIZE(disp_gate_clks); in exynos5260_clk_disp_init()
336 cmu.nr_clk_regs = ARRAY_SIZE(disp_clk_regs); in exynos5260_clk_disp_init()
393 cmu.nr_pll_clks = ARRAY_SIZE(egl_pll_clks); in exynos5260_clk_egl_init()
395 cmu.nr_mux_clks = ARRAY_SIZE(egl_mux_clks); in exynos5260_clk_egl_init()
397 cmu.nr_div_clks = ARRAY_SIZE(egl_div_clks); in exynos5260_clk_egl_init()
400 cmu.nr_clk_regs = ARRAY_SIZE(egl_clk_regs); in exynos5260_clk_egl_init()
495 cmu.nr_mux_clks = ARRAY_SIZE(fsys_mux_clks); in exynos5260_clk_fsys_init()
497 cmu.nr_gate_clks = ARRAY_SIZE(fsys_gate_clks); in exynos5260_clk_fsys_init()
500 cmu.nr_clk_regs = ARRAY_SIZE(fsys_clk_regs); in exynos5260_clk_fsys_init()
584 cmu.nr_mux_clks = ARRAY_SIZE(g2d_mux_clks); in exynos5260_clk_g2d_init()
586 cmu.nr_div_clks = ARRAY_SIZE(g2d_div_clks); in exynos5260_clk_g2d_init()
588 cmu.nr_gate_clks = ARRAY_SIZE(g2d_gate_clks); in exynos5260_clk_g2d_init()
591 cmu.nr_clk_regs = ARRAY_SIZE(g2d_clk_regs); in exynos5260_clk_g2d_init()
645 cmu.nr_pll_clks = ARRAY_SIZE(g3d_pll_clks); in exynos5260_clk_g3d_init()
647 cmu.nr_mux_clks = ARRAY_SIZE(g3d_mux_clks); in exynos5260_clk_g3d_init()
649 cmu.nr_div_clks = ARRAY_SIZE(g3d_div_clks); in exynos5260_clk_g3d_init()
651 cmu.nr_gate_clks = ARRAY_SIZE(g3d_gate_clks); in exynos5260_clk_g3d_init()
654 cmu.nr_clk_regs = ARRAY_SIZE(g3d_clk_regs); in exynos5260_clk_g3d_init()
780 cmu.nr_mux_clks = ARRAY_SIZE(gscl_mux_clks); in exynos5260_clk_gscl_init()
782 cmu.nr_div_clks = ARRAY_SIZE(gscl_div_clks); in exynos5260_clk_gscl_init()
784 cmu.nr_gate_clks = ARRAY_SIZE(gscl_gate_clks); in exynos5260_clk_gscl_init()
787 cmu.nr_clk_regs = ARRAY_SIZE(gscl_clk_regs); in exynos5260_clk_gscl_init()
899 cmu.nr_mux_clks = ARRAY_SIZE(isp_mux_clks); in exynos5260_clk_isp_init()
901 cmu.nr_div_clks = ARRAY_SIZE(isp_div_clks); in exynos5260_clk_isp_init()
903 cmu.nr_gate_clks = ARRAY_SIZE(isp_gate_clks); in exynos5260_clk_isp_init()
906 cmu.nr_clk_regs = ARRAY_SIZE(isp_clk_regs); in exynos5260_clk_isp_init()
963 cmu.nr_pll_clks = ARRAY_SIZE(kfc_pll_clks); in exynos5260_clk_kfc_init()
965 cmu.nr_mux_clks = ARRAY_SIZE(kfc_mux_clks); in exynos5260_clk_kfc_init()
967 cmu.nr_div_clks = ARRAY_SIZE(kfc_div_clks); in exynos5260_clk_kfc_init()
970 cmu.nr_clk_regs = ARRAY_SIZE(kfc_clk_regs); in exynos5260_clk_kfc_init()
1019 cmu.nr_mux_clks = ARRAY_SIZE(mfc_mux_clks); in exynos5260_clk_mfc_init()
1021 cmu.nr_div_clks = ARRAY_SIZE(mfc_div_clks); in exynos5260_clk_mfc_init()
1023 cmu.nr_gate_clks = ARRAY_SIZE(mfc_gate_clks); in exynos5260_clk_mfc_init()
1026 cmu.nr_clk_regs = ARRAY_SIZE(mfc_clk_regs); in exynos5260_clk_mfc_init()
1166 cmu.nr_pll_clks = ARRAY_SIZE(mif_pll_clks); in exynos5260_clk_mif_init()
1168 cmu.nr_mux_clks = ARRAY_SIZE(mif_mux_clks); in exynos5260_clk_mif_init()
1170 cmu.nr_div_clks = ARRAY_SIZE(mif_div_clks); in exynos5260_clk_mif_init()
1172 cmu.nr_gate_clks = ARRAY_SIZE(mif_gate_clks); in exynos5260_clk_mif_init()
1175 cmu.nr_clk_regs = ARRAY_SIZE(mif_clk_regs); in exynos5260_clk_mif_init()
1374 cmu.nr_mux_clks = ARRAY_SIZE(peri_mux_clks); in exynos5260_clk_peri_init()
1376 cmu.nr_div_clks = ARRAY_SIZE(peri_div_clks); in exynos5260_clk_peri_init()
1378 cmu.nr_gate_clks = ARRAY_SIZE(peri_gate_clks); in exynos5260_clk_peri_init()
1381 cmu.nr_clk_regs = ARRAY_SIZE(peri_clk_regs); in exynos5260_clk_peri_init()
1830 cmu.nr_pll_clks = ARRAY_SIZE(top_pll_clks); in exynos5260_clk_top_init()
1832 cmu.nr_mux_clks = ARRAY_SIZE(top_mux_clks); in exynos5260_clk_top_init()
1834 cmu.nr_div_clks = ARRAY_SIZE(top_div_clks); in exynos5260_clk_top_init()
1836 cmu.nr_gate_clks = ARRAY_SIZE(top_gate_clks); in exynos5260_clk_top_init()
1838 cmu.nr_fixed_clks = ARRAY_SIZE(fixed_rate_clks); in exynos5260_clk_top_init()
1841 cmu.nr_clk_regs = ARRAY_SIZE(top_clk_regs); in exynos5260_clk_top_init()