Lines Matching refs:reg_base
157 static void __iomem *reg_base; variable
301 pll_con = readl(reg_base + reg); in exynos4_clk_wait_for_pll()
307 pll_con = readl(reg_base + reg); in exynos4_clk_wait_for_pll()
313 samsung_clk_save(reg_base, exynos4_save_common, in exynos4_clk_suspend()
315 samsung_clk_save(reg_base, exynos4_save_pll, in exynos4_clk_suspend()
319 samsung_clk_save(reg_base, exynos4_save_soc, in exynos4_clk_suspend()
321 samsung_clk_restore(reg_base, src_mask_suspend_e4210, in exynos4_clk_suspend()
324 samsung_clk_save(reg_base, exynos4_save_soc, in exynos4_clk_suspend()
328 samsung_clk_restore(reg_base, src_mask_suspend, in exynos4_clk_suspend()
336 samsung_clk_restore(reg_base, exynos4_save_pll, in exynos4_clk_resume()
342 samsung_clk_restore(reg_base, exynos4_save_common, in exynos4_clk_resume()
346 samsung_clk_restore(reg_base, exynos4_save_soc, in exynos4_clk_resume()
349 samsung_clk_restore(reg_base, exynos4_save_soc, in exynos4_clk_resume()
1377 __raw_writel(tmp, reg_base + PWR_CTRL1); in exynos4x12_core_down_clock()
1382 __raw_writel(0x0, reg_base + E4X12_PWR_CTRL2); in exynos4x12_core_down_clock()
1447 reg_base = of_iomap(np, 0); in exynos4_clk_init()
1448 if (!reg_base) in exynos4_clk_init()
1451 ctx = samsung_clk_init(np, reg_base, CLK_NR_CLKS); in exynos4_clk_init()
1477 ARRAY_SIZE(exynos4210_plls), reg_base); in exynos4_clk_init()
1489 ARRAY_SIZE(exynos4x12_plls), reg_base); in exynos4_clk_init()