Lines Matching refs:DFLAGS
237 #define DFLAGS CLK_DIVIDER_HIWORD_MASK macro
259 RK2928_CLKSEL_CON(0), 6, 2, DFLAGS | CLK_DIVIDER_READ_ONLY,
263 RK2928_CLKSEL_CON(32), 7, 1, MFLAGS, 0, 5, DFLAGS,
268 RK2928_CLKSEL_CON(32), 15, 1, MFLAGS, 8, 5, DFLAGS,
276 RK2928_CLKSEL_CON(26), 8, 1, MFLAGS, 0, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
290 RK2928_CLKSEL_CON(31), 7, 1, MFLAGS, 0, 5, DFLAGS,
293 RK2928_CLKSEL_CON(31), 15, 1, MFLAGS, 8, 5, DFLAGS,
299 RK2928_CLKSEL_CON(10), 8, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
302 RK2928_CLKSEL_CON(10), 12, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
308 RK2928_CLKSEL_CON(29), 1, 5, DFLAGS,
328 RK2928_CLKSEL_CON(21), 0, 1, MFLAGS, 8, 5, DFLAGS,
336 RK2928_CLKSEL_CON(22), 0, 1, MFLAGS, 8, 8, DFLAGS,
347 RK2928_CLKSEL_CON(24), 8, 8, DFLAGS,
351 RK2928_CLKSEL_CON(5), 0, 7, DFLAGS,
367 RK2928_CLKSEL_CON(25), 0, 7, DFLAGS,
370 RK2928_CLKSEL_CON(25), 8, 7, DFLAGS,
374 RK2928_CLKSEL_CON(11), 0, 6, DFLAGS,
377 RK2928_CLKSEL_CON(12), 0, 6, DFLAGS,
380 RK2928_CLKSEL_CON(12), 8, 6, DFLAGS,
386 RK2928_CLKSEL_CON(13), 0, 7, DFLAGS,
394 RK2928_CLKSEL_CON(14), 0, 7, DFLAGS,
402 RK2928_CLKSEL_CON(15), 0, 7, DFLAGS,
410 RK2928_CLKSEL_CON(16), 0, 7, DFLAGS,
528 RK2928_CLKSEL_CON(1), 0, 3, DFLAGS | CLK_DIVIDER_READ_ONLY, div_aclk_cpu_t),
530 RK2928_CLKSEL_CON(1), 12, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO
533 RK2928_CLKSEL_CON(1), 8, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO
536 RK2928_CLKSEL_CON(1), 14, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO
544 RK2928_CLKSEL_CON(10), 15, 1, MFLAGS, 0, 5, DFLAGS,
548 RK2928_CLKSEL_CON(27), 0, 1, MFLAGS, 8, 8, DFLAGS,
553 RK2928_CLKSEL_CON(28), 0, 1, MFLAGS, 8, 8, DFLAGS,
559 RK2928_CLKSEL_CON(29), 8, 5, DFLAGS,
570 RK2928_CLKSEL_CON(33), 8, 1, MFLAGS, 0, 5, DFLAGS,
579 RK2928_CLKSEL_CON(34), 0, 16, DFLAGS,
585 RK2928_CLKSEL_CON(2), 0, 7, DFLAGS,
593 RK2928_CLKSEL_CON(3), 0, 7, DFLAGS,
601 RK2928_CLKSEL_CON(4), 0, 7, DFLAGS,
643 RK2928_CLKSEL_CON(1), 3, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
648 RK2928_CLKSEL_CON(0), 5, 1, MFLAGS, 0, 5, DFLAGS),
650 RK2928_CLKSEL_CON(1), 12, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO),
652 RK2928_CLKSEL_CON(1), 8, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO),
654 RK2928_CLKSEL_CON(1), 14, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
661 RK2928_CLKSEL_CON(10), 15, 1, MFLAGS, 0, 5, DFLAGS,
665 RK2928_CLKSEL_CON(27), 0, 1, MFLAGS, 8, 8, DFLAGS,
668 RK2928_CLKSEL_CON(28), 0, 1, MFLAGS, 8, 8, DFLAGS,
672 RK2928_CLKSEL_CON(34), 7, 1, MFLAGS, 0, 5, DFLAGS,
684 RK2928_CLKSEL_CON(30), 0, 2, DFLAGS,
687 RK2928_CLKSEL_CON(11), 8, 6, DFLAGS),
692 RK2928_CLKSEL_CON(3), 0, 7, DFLAGS,