Lines Matching refs:COMPOSITE
262 COMPOSITE(0, "aclk_vepu", mux_pll_src_cpll_gpll_p, 0,
267 COMPOSITE(0, "aclk_vdpu", mux_pll_src_cpll_gpll_p, 0,
275 COMPOSITE(0, "ddrphy", mux_ddrphy_p, CLK_IGNORE_UNUSED,
289 COMPOSITE(0, "aclk_lcdc0_pre", mux_pll_src_cpll_gpll_p, CLK_IGNORE_UNUSED,
292 COMPOSITE(0, "aclk_lcdc1_pre", mux_pll_src_cpll_gpll_p, 0,
327 COMPOSITE(0, "mac_src", mux_mac_p, 0,
335 COMPOSITE(0, "hsadc_src", mux_pll_src_gpll_cpll_p, 0,
543 COMPOSITE(0, "aclk_peri_pre", mux_pll_src_gpll_cpll_p, 0,
547 COMPOSITE(0, "dclk_lcdc0_src", mux_pll_src_cpll_gpll_p, 0,
552 COMPOSITE(0, "dclk_lcdc1_src", mux_pll_src_cpll_gpll_p, 0,
569 COMPOSITE(0, "aclk_gpu_src", mux_pll_src_cpll_gpll_p, 0,
660 COMPOSITE(0, "aclk_peri_pre", mux_pll_src_cpll_gpll_p, 0,
664 COMPOSITE(DCLK_LCDC0, "dclk_lcdc0", mux_pll_src_cpll_gpll_p, 0,
667 COMPOSITE(DCLK_LCDC1, "dclk_lcdc1", mux_pll_src_cpll_gpll_p, 0,
671 COMPOSITE(0, "aclk_gpu_src", mux_pll_src_cpll_gpll_p, 0,